Hybrid ASIC Verification Intern
Hewlett Packard Enterprise
Hewlett Packard Enterprise Company in Roseville, CA is seeking an ASIC Post-Si Verification Engineering Intern. The role supports RTL/Physical Design, Pre-/Post-Silicon verification, and tool development within the ASIC/VLSI team. You will learn from senior engineers and contribute to multiple assignments based on your skills. The position is designed for students pursuing a Bachelor’s or Master’s in a technical field, with at least 3 years of engineering coursework completed, and a strong #J-18808-Ljbffr Hewlett Packard Enterprise Company
Vacancy posted 3 days ago
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