ASIC Design Engineer, ML Acceleration Team
Annapurna Labs (U.S.) Inc.
Salary: $136,000 - 212,800 per year Requirements:
- We require a bachelors degree in Electrical Engineering or a closely related discipline.
- We need experience identifying bugs across architecture, algorithms, functionality, and performance, with strong debugging capability.
- We require experience validating designs at multiple levels, from IP blocks through SoCs to full-system testing.
- A masters degree in Electrical or Communications Engineering, or a related field, is preferred.
- Experience with formal verification methods, including abstraction and end-to-end checking, is preferred.
- Experience with ARM and various DSP instruction set architectures is preferred.
- Experience with current and emerging RF standards in cellular, WiMAX, 802.11ad, microwave backhaul, or similar broadband wireless standards is preferred.
- Experience using industry-standard tools and scripting languages such as Python or Perl for automation is preferred.
- We are looking for a strong background in ASIC design, proficiency with SystemVerilog, and strong analytical and problem-solving skills.
- Experience with high-performance, power-efficient design is highly desirable.
- We value a Learn and Be Curious mindset.
- Familiarity with interconnects, DMAs, memory subsystems, accelerator engines, debug, and system-level architectures is desirable.
- A strong drive to innovate, explore new solutions, and contribute to intellectual property through patents is important.
- We develop and implement high-performance, area-efficient, and power-efficient RTL designs aligned to project targets.
- We analyze designs, microarchitectures, and architectures to balance features, power, performance, and area.
- We create microarchitectures, write SystemVerilog RTL, and deliver synthesis-ready, timing-clean designs with the right constraints.
- We run lint checks and clock-domain-crossing quality checks to protect design integrity.
- We work closely with architects, designers, verification specialists, pre- and post-silicon validation teams, and synthesis, timing, and back-end experts.
- We help design and optimize hardware in our data centers, including our custom machine learning inference server architecture.
- ARM
- AWS
- Cloud
- Hardware
- Machine Learning
- Perl
- Python
- SystemVerilog
- Web
- Flow
- Support
More:
Amazon Web Services provides a highly reliable, scalable, low-cost cloud infrastructure platform that supports hundreds of thousands of businesses across 190 countries. Our custom SoCs sit at the core of AWS machine learning servers, and our Cloud-Scale Machine Learning Acceleration team focuses on hardware design and optimization for our data centers, including AWS Inferentia. We operate across U.S., Europe, Singapore, and Japan data center locations, and we are hiring for Cupertino, CA, or Austin, TX. Our team values inclusion, work-life balance, mentorship, and career growth, and we offer comprehensive benefits including health coverage, 401(k) matching, paid time off, parental leave, sign-on payments, and RSUs, with salary ranges of $157,300-$212,800 in Cupertino and $136,000-$184,000 in Austin.
last updated 40 week of 2026
Do you want to receive more vacancies?
Subscribe and receive similar vacancies to ASIC Design Engineer, ML Acceleration Team. Be the first to apply!
- senior software design engineer Cupertino, CA
- product design engineer Cupertino, CA
- new product engineer Cupertino, CA
- design engineer Cupertino, CA
- data center design engineer Cupertino, CA
- product engineer Cupertino, CA
- digital design engineer Cupertino, CA
- internship machine learning Cupertino, CA
- machine learning Cupertino, CA
- machine learning intern Cupertino, CA
