Senior Digital ASIC Designer - Hardware
Draper
Draper Laboratory is seeking a Senior Digital ASIC Designer to develop high-performance digital ASICs from RTL through synthesis. You will work in multidisciplinary teams on projects across application areas and contribute to design-for-test as well as layout considerations. The role requires 7–10 years of ASIC hardware experience (or 5–10 with a Master’s), expertise in front-end design, SystemVerilog, and proficiency with Cadence or Synopsys toolchains. U.S. #J-18808-Ljbffr
Vacancy posted 5 days ago
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