Research Fellow (IC Designer)

We are looking for a Research Fellow for the Architectures and circuits for pervasive 5G silicon chip connectivity with end-to-end system millimeter scale and 1,000X reduction in radio power consumption project led by Professor Massimo Alioto, at the Department of Electrical and Computer Engineering, National University of Singapore (NUS). The selected candidate is expected to: Develop innovative circuit architectures for research projects and performing transistor-level design, simulation, and layout of analog, digital blocks and mixed-signal using industry-standard EDA tools. Drive the silicon chip design through the full tape-out flow, including pre-layout and post-layout simulations, physical verification (DRC/LVS), and parasitic extraction. Develop test plans, designing PCB test boards, and performing detailed silicon characterization and debugging using lab equipment. Authoring high-quality research papers for leading conferences and journals and presenting findings at international conferences. Managing technical milestones for the project and providing technical guidance to PhD and Master's students within the group. The appointment can commence immediately with a 1-year contract, with prospect of extension. Salary will be commensurate with qualifications and experience. Qualifications a PhD degree in either Electrical Engineering or strictly related (e.g., Computer, Electronics, Communication, or Information Engineering). Knowledge on circuit architectures, transistor-level design. Knowledge on silicon chip design, EDA tools. Ability to work independently and collaboratively in a team environment. Good communication and interpersonal skills. Open to fixed term contract. More Information Location: Kent Ridge Campus Organization: College of Design and Engineering Department : Electrical and Computer Engineering #J-18808-Ljbffr National University of Singapore