Embedded SoC Architect

THE ROLE The AMD Adaptive Embedded Computing Group is seeking an Embedded SoC Architect to help define and deliver the next generation of custom embedded platforms. This role offers the opportunity to architect real silicon from concept through execution, shaping how compute, memory, interconnect, and I/O come together to power emerging markets. You’ll play a key role in expanding x86 into automotive IVI, robotics, and next‑generation embedded systems, working within a small, high‑impact architecture team with meaningful ownership across a full product family and roadmap. For architects who enjoy broad technical scope, real decision‑making authority, and building something new, this is a chance to make a visible, lasting impact. THE PERSON You are a system‑level architect with strong experience shaping SoC architectures and translating real‑world use cases into scalable silicon solutions. You bring broad technical perspective, integrating processor subsystems, memory, interconnects, and I/O into coherent, balanced designs. You work comfortably across teams, partnering with IP, hardware, software, and functional stakeholders to make informed architectural tradeoffs. You value clear communication, produce high‑quality architecture documentation, and stay engaged through execution to ensure design intent is carried from concept to silicon. KEY RESPONSIBILITIES Responsible for driving low‑power, cost‑optimized SoC architectures with processor, accelerator and I/O subsystems. Define SoC architectures with internal embedded processor‑subsystems, Network on Chip, Memory controllers, and FPGA fabric. Create flexible and modular subsystem architectures that can be deployed in either chiplet, monolithic or 3D form factors. Work with customers and cross‑functional teams to scope SoC requirements, analyze PPA tradeoffs, and then define architectural requirements that meet the PPA and schedule targets. Define hardware, software, and firmware interactions between embedded processing subsystems, hardware accelerators, and external CPUs. Author architecture specifications in clear and concise language, and guide and assist pre‑silicon design/verification and post‑silicon validation during the execution phase. PREFERRED EXPERIENCE Technical background architecting SoC, processor, accelerator and I/O subsystems. Technical knowledge of cores running either x86, RISC‑V or ARM ISA. Knowledge of I/O protocols such as PCIe, Ethernet, USB, eDP/DP, and how SoCs are architected to integrate across the various subsystems. Experience in memory subsystems including DDR/LPDDR, UFS, SPI, ONFI. Expertise in at least one domain such as embedded computing, aerospace & defense, data‑center, networking, or automotive industries. Knowledge of ARM processors and AXI interconnects (desired). Knowledge of AI/ML accelerators (desired). Knowledge of boot, security, debug and telemetry. Knowledge of FuSA design methodology. ACADEMIC CREDENTIALS BS/MS/PhD in electrical or computer engineering or related field. LOCATION Austin, TX or San Jose, CA This role is not eligible for visa sponsorship. EEO STATEMENT AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third‑party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. #J-18808-Ljbffr