Senior Principal Analog IP Architect - Power & Clocking
onsemi
onsemi is seeking an experienced Analog Design Engineer to contribute to power management and clocking IP blocks for the Treo Platform SoCs. You will lead detailed design, verification, and delivery of analog IP, collaborating with digital, validation, and CAD teams to enable tape-out and silicon validation. This hands-on role requires 10+ years in analog IC design, deep knowledge of PM and clocking circuits, and proficiency in SPICE/AMS simulations. #J-18808-Ljbffr onsemi
Vacancy posted 2 days ago
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