Senior Staff Solution Architect - Teamcenter PLM (Semiconductor)

Company

Qualcomm Incorporated

Job Area

Information Technology Group, Information Technology Group > IT Architect

General Summary

The Solution Architect – Teamcenter PLM (Semiconductor) is responsible for designing and governing business‑capability‑driven PLM solutions, using Siemens Teamcenter as the enterprise backbone for semiconductor product lifecycle management.

This role is critical in the transformation journey of moving from legacy PLM to Teamcenter (SlCM) and focuses on mapping business capabilities, product lifecycle needs, and governance requirements into scalable, sustainable Teamcenter solution designs. The architect owns current‑state PLM solution architecture and defines a future‑state digital thread roadmap, clearly distinguishing between existing capabilities and forward‑looking architectural options.

Infrastructure and environment architecture are supporting considerations; the primary focus is on product capabilities, data models, processes, and lifecycle governance.

This role requires full‑time onsite work in San Diego, CA (5 days per week).

Minimum Qualifications

• 7+ years of IT‑specific work experience with a Bachelor's degree.
• OR 9+ years of IT‑specific work experience without a Bachelor’s degree.

Key Responsibilities

1. Business Capability–Driven PLM Solution Architecture

• Lead solution architecture by translating business capabilities into Teamcenter functional designs, including:
  • Product definition and configuration
  • Change and release governance
  • Lifecycle and revision management
  • Manufacturing readiness and handoff
• Partner with business stakeholders to ensure PLM solutions reflect how the semiconductor business operates, not generic PLM implementations.
• Ensure solution designs balance flexibility, governance, scalability, and long‑term sustainability.

2. Teamcenter Product Capability Mastery (Core Requirement)

This role requires deep mastery of Teamcenter’s product capabilities, with the ability to deliberately and correctly apply them to complex semiconductor use cases.

Expected capability mastery includes, but is not limited to:

• Product Structure & BOM Management
  • Item and Item Revision modeling
  • Multi‑view BOMs (design, manufacturing, test, system)
  • Variant and effectivity strategies
  • Long‑lifecycle and derivative product structures
• Lifecycle & Configuration Management
  • Lifecycle state design
  • Revision and release strategies
  • Governance patterns for long‑running semiconductor products
• Change Management
  • Change objects, workflows, and impact analysis
  • Multiple change processes aligned to lifecycle states
  • Auditability and traceability for high‑impact changes
• Workflow & Process Orchestration
  • Business‑driven workflow modeling
  • Alignment of workflow automation to decision ownership
  • Avoidance of over‑customization
• Classification, Metadata & Information Modeling
  • Attribute strategies supporting reuse, reporting, and analytics
  • Data standardization across products and generations
• Security & Access Control (Business Perspective)
  • Role‑based access aligned to functional responsibilities
  • Protection of sensitive product and roadmap information

The architect is expected to act as a Teamcenter product authority, able to explain and defend why specific platform capabilities are used—or consciously not used—for each business need.

3. Semiconductor Product Lifecycle Enablement

• Architect PLM solutions that support semiconductor‑specific realities, including:
  • Silicon and derivative product hierarchies
  • Long product lifecycles with high change velocity
  • Complex product structures across silicon, package, test, and system views
  • Sustaining engineering, errata, and lifecycle traceability

Ensure Teamcenter remains the authoritative system for product structure and change governance.

4. Change, Configuration & Governance Architecture

• Define solution patterns for multiple change processes aligned to lifecycle states
• Architect governance for:
  • Pre‑release vs post‑release changes
  • High‑impact and high‑risk semiconductor changes
• Ensure workflows and data models support auditability, traceability, and downstream impact analysis

5. Digital Thread Roadmap & System‑of‑Systems Design

• Define and evolve a business‑driven digital thread roadmap spanning:
  • Product definition
  • Manufacturing readiness
  • Quality and lifecycle feedback
• Identify and document future‑state architectural opportunities to improve traceability and system alignment
• Evaluate potential future PLM touchpoints with:
  • Design‑side systems (e.g., ECAD, MCAD, design metadata)
  • Manufacturing and test systems
  • Quality, reliability, and analytics platforms

This role focuses on architectural readiness and roadmap definition, without assuming current‑state integrations.

6. ECAD / MCAD & Cross‑Discipline Alignment

• Ensure PLM solution designs support effective coexistence with:
  • ECAD systems
  • MCAD systems
  • Other engineering authoring tools
• Architect data models, governance, and metadata strategies that enable:
  • Cross‑discipline alignment
  • Configuration consistency
  • System‑of‑systems scalability without tool lock‑in

7. Closed‑Loop Quality Enablement

• Architect PLM solutions that support closed‑loop quality capabilities, including:
  • Linking quality events to product structures and changes
  • Traceability for failures and corrective actions
• Ensure PLM designs support root cause analysis and lifecycle learning, even when execution occurs in downstream systems

8. Integration Strategy (Business‑First)

• Define capability‑level integration requirements between Teamcenter and:
  • ERP systems
  • Manufacturing and test systems
  • Analytics and reporting platforms
• Establish clear system boundaries, data ownership, and governance principles
• Prevent point‑to‑point solutions that undermine lifecycle integrity

9. Vendor & SI Architectural Leadership

• Act as solution architecture authority for system integrators and vendors
• Review and challenge solution designs that:
  • Misuse Teamcenter capabilities
  • Introduce unnecessary customization
  • Compromise upgradeability or lifecycle governance
• Ensure PLM architecture remains enterprise‑owned, sustainable, and future‑ready

10. Infrastructure & Environment Considerations (Nice to Have)

• Collaborate with platform and infrastructure teams to ensure:
  • Solution designs are deployable and operable
  • Non‑functional requirements are understood
• Provide guidance on environment strategy, performance expectations, and availability as needed

Experience Requirements

Overall Experience

• 10–15+ years of experience in IT, engineering systems, or enterprise solution design

PLM Experience

• 10–15+ years in PLM solution architecture and delivery
• 6–10+ years of Siemens Teamcenter experience in architect or lead roles
• Proven ability to map business processes and capabilities to Teamcenter designs

Semiconductor / High‑Tech Experience

• 8–12+ years supporting semiconductor and complex hardware product lifecycles
• Strong understanding of design‑heavy, change‑intensive environments

Education

Required

• Bachelor’s degree in Engineering, Computer Science, Information Systems, or equivalent

Preferred

• Master’s degree in Engineering, Computer Science, Systems Engineering, or Engineering Management

Professional Expectations

• Strong business‑to‑technology translation skills
• Ability to influence without direct authority
• Comfortable operating in ambiguity and future‑state planning
• Enterprise‑first, long‑term architectural mindset
• Excellent executive‑level communication and documentation skills

Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e‑mail disability‑View email address on click.appcast.io or call Qualcomm's toll‑free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).

EEO Employer

Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.

Pay range and Other Compensation & Benefits:

$148,000.00 - $222,000.00

The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales‑incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer – and you can review more details about our US benefits at this link.

If you would like more information about this role, please contact Qualcomm Careers.