Senior ASIC Design Engineer - Static Timing & STA
Cisco Systems
Cisco Systems, Inc. seeks an ASIC Design Engineer to join the Silicon One team in San Jose, California. This role involves developing methodologies for static timing analysis and collaborating with the Physical Design team to ensure design accuracy. Ideal candidates will hold at least a Bachelor’s degree in Electrical or Computer Engineering and have substantial ASIC Design experience. The position offers a unique opportunity to work within a dynamic team that blends large organization support with a startup culture. #J-18808-Ljbffr
$116k - $189.75k
...Be Doing: Drive Physical Design and timing analysis and closure of NVIDIA... ...Electrical or Computer Engineering (or equivalent experience... ...in Timing and Static Timing Analysis (STA). Hands‑on experience in... ...in timing convergence for ASICs, CPUs, GPUs or Network processors...Suggested- ...provides a unique experience for ASIC engineers by combining the resources... ..., you'll work on closing timing at block, sub-chip, and... .... Your Impact As an ASIC Design Engineer on the STA team, you will play a... ...pivotal role in extraction and static timing analysis (STA) flow...Suggested
$178.9k - $259k
...Senior Static Timing Analysis (STA) Developer We are seeking an experienced Senior Static Timing Analysis (STA) Developer to architect, design and optimize next‑generation timing analysis engines for advanced ASIC and FPGA design flows. This role is ideal for someone who...SeniorLocal areaShift work$181.1k - $318.4k
...technology company in California is seeking a senior engineer for their wireless silicon development team. The role involves generating static timing constraints and utilizing scripting skills, with a focus on ASIC design. Candidates must have a BS degree and at least...Senior$170k - $230k
...human life on Mars. SR. SOC/ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At... ..., place and route, timing, noise, physical verification... ...closure issues in static timing analysis (STA), noise, logic equivalency... ...Physical Design Engineer/Senior: $170,000.00 - $230,000....SeniorPermanent employmentTemporary workWorldwideWeekend work$180k - $230k
.... We are looking for talented engineers and leaders who have an entrepreneurial... ...and want to drive their design from concept to silicon to their next car. Senior ASIC Front-End Design Engineer... ...synthesis, lint, CDC, LEC, and static timing analysis to deliver a design meeting...SeniorRemote workFlexible hours$165k - $241.4k
...provides a unique experience for ASIC engineers by combining the resources... ...talent with vast ASIC design and development expertise. With... ...and a deep understanding of timing constraints, including clock... ...Proficient in industry-standard SDC/STA tools and scripting for...Full timeTemporary workWork at officeLocal areaFlexible hours$136k - $212.75k
...clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible... .... The team collaborates with the front design team to understand the clocking requirements... ..., Power Optimization and Ease of timing closure to innovate and implement new Clocking...SeniorWork experience placement- ...A leading semiconductor company is seeking a Senior ASIC Design Engineer to join their Silicon Design team in San Jose, CA. The ideal candidate... ...generation embedded products, ensuring design quality and timing closure. With expertise in Verilog RTL coding and ASIC development...Senior
$150k - $220k
...will fundamentally change the design, economics, manufacturing... ...life. We are seeking a Senior ASIC Design Engineer to join our processor subsystem... ...· Support synthesis and timing closure for the processor... ...Familiarity with synthesis flows and static timing analysis in the...SeniorFull timeWork at officeImmediate startVisa sponsorshipNight shift$136k - $218.5k
We are now looking for an ASIC Design Engineer. NVIDIA is seeking best-in-class ASIC Design Engineers to design and implement the world’s leading... ...implement in RTL, and deliver a fully verified, synthesis/ timing clean design. Support post‑silicon validation activities....Senior- ...ground up. Job Description: ASIC Design Engineer In this role, you will be... ...the design meets rigorous timing and power requirements.... ...and datapath components. STA & Timing: Analyze and fix timing... ...with the concept of Static Timing Analysis, including path...
$180k - $210k
...per year Credo is engineering the future of high-speed... ...Cables(AECs) all designed for maximum performance... ...Role As a Principal ASIC Design Engineer, you will... ...with PD, DFT, STA, and integration teams... ...Knowledge of synthesis and static timing analysis. ~ Experience...- A leading technology company is seeking a Cellular ASIC Design Engineer to develop and optimize the design and methodology for integrated circuits... ...a strong VLSI background, with responsibilities including timing closure, power optimization, and collaboration with cross-...Senior
$136k - $218.5k
...NVIDIA is looking for a Senior ASIC Design Engineer for our Memory Controller team! What You’ll Be Doing: Collaborate with architects, software... ...including RTL design, synthesis, functional verification, and timing analysis using groundbreaking CAD tools and the latest...Senior$120k - $220k
...system that will fundamentally change the design, economics, manufacturing and service... ...quality of life. We are seeking a Senior STA Methodology Engineer to join our ASIC design team. In this role, you will own cross-functional timing methodology efforts across multiple...SeniorFull timeWork at officeImmediate startVisa sponsorshipNight shift$200k - $220k
Staff / Senior Staff Physical Design Engineer Bolt Graphics is a semiconductor... ...critical role in achieving timing, power, and area (... ...using advanced STA methodologies (OCV/POCV... ...of experiencein ASIC physical design Proven... ...verification Static Timing Analysis (STA...Senior- ...Advanced Micro Devices in Santa Clara is looking for a skilled engineer to contribute to ASIC design for high-performance network chips. You'll work within the NTSG ASIC Design Team focusing on achieving first-pass silicon success through collaboration with architecture...Senior
$136k - $218.5k
...Responsibilities Drive timing analysis and closure for DFT... ...constraints for custom DFT designs, drive timing and power convergence... ...in Electrical or Computer Engineering with 5+ years’ experience... .... Hands-on experience in Static Timing Analysis (STA) and driving timing...Senior$180k - $223k
...A cutting-edge technology company in San Jose is seeking an ASIC Sr. Staff Engineer responsible for the design and debug of complex digital subsystems. The ideal candidate will have a BS or MS in Electrical Engineering and over 5 years of experience in ASIC design and...Senior$153.2k - $229.8k
...Qualcomm is seeking an experienced ASIC Engineer to drive the development of high-performance IP for world-class products in Santa Clara,... ...candidate should have at least 4 years of experience in ASIC design and possess a relevant degree. Responsibilities include defining...Senior$165k - $241.4k
...Inc. is seeking an experienced engineer for their Silicon One team in San... ...focuses on developing full-chip timing constraints for networking SoCs, driving Static Timing Analysis, and collaborating... ...and extensive experience in ASIC design. A competitive salary range between...SeniorFull timeFlexible hours$120k - $192k
...Itlearn360 is seeking a Senior ASIC Physical Design Engineer to contribute to SerDes connectivity ASICs at their data center products. Candidates should have an MS in Electrical or Computer Engineering and over 6 years of physical design experience. This role requires...Senior$126.8k - $220.9k
...A leading technology company is seeking a Physical Design Engineer to contribute to the design of high performance PHY from RTL to GDSII. Responsibilities include generating timing constraints, building chip floor-plans, and validating designs adhering to power and timing...Senior- Palo Alto Networks, Inc. is seeking an experienced ASIC CAD Engineer in Santa Clara, California. In this role, you... ...will be the vital link between front-end logic and design teams, focusing on Logic Synthesis, Static Timing Analysis, and Power Optimization. The ideal...Senior
- ...Responsibilities Responsible for all aspects of physical design and implementation of GPU and other ASICs targeted at the desktop, laptop, workstation,... ...distribution, chip assembly and P&R, and timing closure. Craft designs for static timing analysis, power and noise analysis and...Senior
$136k - $218.5k
...you’ll be doing: Drive Timing Analysis and Closure: Lead... ...Electrical or Computer Engineering with 5 years’... ...experience in Timing and STA Hands‑on experience in full‑chip/sub‑chip Static Timing Analysis (STA) and... ...Experience in physical design and optimization e.g.,...Senior$126.7k - $190.1k
Qualcomm is seeking a skilled ASIC designer to join their Santa Clara team. This role requires significant experience in micro-architecture and design integration, with hands-on responsibilities throughout the ASIC lifecycle. Successful candidates will collaborate closely...Senior$170k - $230k
SpaceX is seeking a Sr. SOC/ASIC Physical Design Engineer to develop next-generation silicon for space and ground infrastructures. You'll work with top engineers across various disciplines to enhance the Starlink network, enabling connectivity globally. Ideal candidates...Senior- ...We are looking for Sr. ASIC Design Engineer to join our rapidly growing ASIC design team focused on high performance data center infrastructure... ...Demonstrated ability to resolve customer issues and deliver timely results Teamwork spirit and effective communication...Senior
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