Lead Power Packaging Engineer - SiP & Wafer-Level Tech
Renesas Electronics Corp.
Renesas Electronics Corp. is seeking a senior Package Technology Development leader to drive R&D and NPI for AI/Datacenter infrastructure power packaging. You will manage OSAT/CM collaborations, define roadmaps, and optimize processes to meet stringent product qualifications. The role requires 15 to 20 years in package development with emphasis on power SiP/module and wafer-level/flip-chip packaging, plus strong analytical and presentation skills. #J-18808-Ljbffr Renesas Electronics Corp.
Vacancy posted 5 days ago
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