CPU Verification Engineer — UVM/SystemVerilog (On-site Austin)
$105.65k - $200.34kIntel Corporation
A leading technology firm in Austin, Texas is seeking a motivated CPU Verification Engineer. The role involves validating CPU logic designs using robust verification methodologies. Candidates should have a degree in Electrical Engineering or a related field, with experience in SystemVerilog and UVM-based testbenches. The position offers a competitive salary range between $105,650 and $200,340, and requires on-site presence. #J-18808-Ljbffr Intel Corporation
$105.65k - $200.34k
**Welcome!**.CPU Verification Engineer page is loaded## CPU Verification... ...: US, Texas, Austin: US, Oregon, Hillsborotime... ....* Build scalable UVM-based testbenches and... ...experience developing SystemVerilog in UVM-based test-benches... ...will require an on-site presence. \* Job...WebsiteLocal areaImmediate startShift work$122.44k - $172.86k
...Silicon & Platform Engineering Group as a CPU Design Verification Engineer on the innovative... ...environments using UVM-based testbenches... ...Verilog, VHDL, or SystemVerilog, and industry‑... ...Location: US, Texas, Austin; Additional... ...USD. Work Model: On‑site presence required....WebsiteLocal areaWorldwideShift work- ...‑silicon functional verification of complex CPU and SoC logic to ensure... ..., testbenches, and SystemVerilog/UVM environments,... ...and physical design engineers to improve design quality... ...Location: US, Texas, Austin Additional Locations... ...between working on‑site at their assigned Intel...WebsiteLocal areaShift work
- ...Designs is looking for a Senior Design Verification Engineer with over 8 years of hardware verification experience, particularly in SystemVerilog and UVM methodologies. The role includes... ...role with long-term opportunities in Austin, TX, and potentially remote work. Benefits...SuggestedRemote jobContract work
- Ericsson GmbH in Austin, TX is seeking a Senior Design Verification Engineer to lead verification efforts... ...level models, designing UVM testbenches, and driving... ...experience and strong SystemVerilog/UVM skills. Join a dynamic... ...collaboration in an on-site/hybrid environment. #J...Website
- Correct Designs is seeking a Design Verification Engineer to work on complex design verification in Austin, Texas. The role offers variety in contract positions... ...candidates will have strong experience in SystemVerilog and UVM, along with excellent communication skills....Remote jobHourly payContract workFlexible hours
$91.15k - $128.69k
Job Details Title: Junior CPU Design Verification Engineer Location: Austin, Texas, USA (primary); additional locations... ...or Tcl). Experience with C++ and SystemVerilog. Preferred Qualifications : Use... ...model — split time between on‑site at the Intel site and off‑site. Salary...WebsiteWork experience placementLocal area- Qualcomm is seeking a highly motivated Hardware Verification Engineer in Austin, Texas. In this role, you will verify complex digital designs... ...include developing test benches using SystemVerilog and UVM, designing verification plans, and collaborating across...
$150k - $165k
Encore Semi Llc is seeking a Senior Design Verification Engineer to verify complex digital systems, including ARM-based CPUs. The role includes developing UVM/SystemVerilog testbenches and automating testing processes. The ideal candidate should have 10+ years of ASIC verification...Remote job- Correct Designs in Austin, TX is seeking a talented Design Verification Engineer to ensure the quality of complex design blocks... .... This role supports advanced CPU/GPU based SOCs across various... ...verification, proficiency in SystemVerilog and UVM methodologies, and strong...Remote jobLong term contract
- A leading technology company in Austin is seeking an experienced ASIC Verification Engineer to work on system-level IP projects. Candidates should have a strong background... ..., with expertise in System Verilog and UVM. This position offers a competitive salary based on...
- ...oriented and motivated design verification engineers who are interested in... ...the architecture of the X86 CPU core. Your contributions will... ...engineers located in different sites/time zones. You have strong... ...field of study. Location Austin, TX #LI-MR1 #LI-Hybrid Benefits...WebsiteWork experience placement
- ...Role: Verification Engineer Location: Austin, TX (Onsite) Duration: 12 months contract JOB DUTIES:... ...ASICs and/or IP cores for a combined CPU/GPU development effort. • Be part... ...Makefiles. • Experience in Verilog/SystemVerilog/SystemC, preferred. • Experience...Contract work
$91.15k - $128.69k
Intel Corporation is looking for a Junior CPU Design Verification Engineer in Austin, Texas. In this role, you will perform verification of CPU logic... ...and has experience with digital logic design, C++, and SystemVerilog. This position offers a hybrid work model and an...- A leading semiconductor company in Texas is seeking a Design Verification Engineer to join its team. This role involves planning and executing the... ...using advanced techniques and tools like System Verilog and UVM. The ideal candidate will have a strong background in...
$168k - $264.5k
Senior Verification Engineer - CPU page is loaded## Senior Verification Engineer - CPUlocations: US, CA, Santa Clara: US, TX, Austintime type... ...constrained-random verification environment using SystemVerilog and UVM.* Proficient in one or more scripting languages like Python...Work experience placement- A leading semiconductor company based in Austin, TX is seeking a Core Design Verification Engineer. This role involves verifying new and existing features of x86 CPU architectures in a C++ and SystemVerilog environment. Candidates should have a strong passion for computer...
- Ericsson GmbH in Austin, Texas is looking for an ASIC Design Verification Engineer to join their team. This role involves building transaction-level models... ...verification experience and a proven track record with SystemVerilog and UVM. In addition to a competitive salary,...
- Intel Corporation in Austin, Texas, seeks an Experienced Hire for a role focused on leading pre-silicon functional verification of CPU and SoC designs. The ideal candidate will have a strong background in SystemVerilog, collaborate across various teams, and drive efficiency...
- Senior Design Verification Engineer — ASIC IP Silicon Verification | 5G Infrastructure | Austin, TX (On‑site, Hybrid) Ericsson's ASICs are the backbone... ...- designing and building UVM environments from a clean... ...and/or top level. Strong SystemVerilog/UVM skills - not only use...Website
- ...The Role As a Core Design Verification Engineer, you will be responsible for... ...AMD’s next‑generation x86 CPU cores. This role focuses on... ...verification using a C++ and Verilog/SystemVerilog‑based environment, with an... ...Science Location: Austin, TX This role is not eligible...
- Intel Corporation is seeking a CPU Design Verification Engineer to join their Silicon & Platform Engineering Group in Austin, Texas. This role involves leading CPU verification tasks, developing UVM-based testbenches, and working closely with architects to ensure design...
$168k - $310.5k
A leading technology company in Austin is looking for a Senior Verification Engineer to redefine computing through innovative verification strategies for CPU designs. Candidates should have a PhD, Master’s, or Bachelor's in EE/CS with at least 8 years of verification experience...$105.65k - $200.34k
...on validation of the CPU internals and CPU integration... ...with other engineers for design optimization... ...architecture, design, verification, board, platform, and... ...Qualifications: Verilog, SystemVerilog, and x86 assembly coding... ...Location: US, Texas, Austin All qualified applicants...Local areaShift work- A leading technology company in Austin is looking for a CPU Design Verification Engineer. This role involves verifying CPU design functionality, developing test plans, and collaborating closely with architecture and RTL designers to ensure product quality. Candidates should...
- A technology company in aerospace is seeking a Senior Verification Engineer I in Austin, Texas. The ideal candidate will have at least 4 years of... ...design verification, proficient in VHDL, Verilog, and SystemVerilog. This position involves developing testbenches, contributing...Full time
$220.92k - $311.89k
...and cloud. As a Senior Formal Verification Engineer, you will play a critical... ...verification environments using SystemVerilog Assertions (SVA) and... ...techniques. Familiarity with UVM‑based simulation environments... ...their time between working on‑site at their assigned Intel site...WebsiteLocal areaShift work- ASIC Design Verification Engineer - Austin, Texas Hybrid work schedule. This is not a... ...to chip. Design and build UVM testbenches from scratch, not... ...practical experience with SystemVerilog and UVM. Proven ability to... ...with computer architecture: CPU pipelines, memory hierarchies...Temporary work
- Design Verification Engineer Looking for new challenges? Would you... ...prior System Verilog UVM experience to work... ...our major clients in Austin, TX and nationwide. Opportunities... ...of advanced CPU/GPU based SOCs. We... ...Strong background in SystemVerilog and UVM verification...Long term contractContract workRemote work
- ...products to millions of customers quickly. Description As a CPU Design Verification Engineer owning the verification of a certain area of... ...test cases in the plans are covered• Develop checkers and SystemVerilog or C-base transactors to verify the design Minimum Qualifications...
Do you want to receive more vacancies?
Subscribe and receive similar vacancies to CPU Verification Engineer — UVM/SystemVerilog (On-site Austin). Be the first to apply!
- validation engineer Austin, TX
- senior validation engineer Austin, TX
- senior verification engineer Austin, TX
- validation specialist Austin, TX
- verification engineer Austin, TX
- validation consultant Austin, TX
- system verification engineer Austin, TX
- design verification engineer Austin, TX
- verification & validation engineer Austin, TX
- system validation engineer Austin, TX

