Senior Embedded Software Engineer

Senior Embedded Software Engineer - Ethernet RetimersSan Jose, California, United StatesAstera Labs provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs' Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company's COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company's custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements.Role OverviewAstera Labs' Taurus product line includes Ethernet retimers and gearboxes deployed in active electrical cables and in-system applications at the heart of AI infrastructure. As AI clusters scale to tens of thousands of GPUs connected by high-speed Ethernet fabrics, the firmware running on these connectivity devices is mission-critical — and so is the ability to debug it fast when something breaks.We're looking for a Firmware Engineer who can bridge our system validation team and firmware development organization. When something goes wrong in the lab or in the field, you won't be waiting on others to dig into the firmware. You'll be the person in the room who understands both sides — can pull up the code, identify the problem, and fix it. If you've worked at a networking company, know how Ethernet actually works from the MAC down through the PHY, have debugged real link failures, and have written or modified firmware or low-level drivers, this role was designed for you.Your primary focus will be debug and system integration. You will be an integral part of the firmware team and work on new feature development, but you will be the point person in the lab helping to unblock other teams — triaging failures, understanding what the firmware is doing, and making targeted fixes without requiring a long handoff loop. Beyond that, you'll contribute to feature development and help bring new products from initial bringup into customer deployment.Key ResponsibilitiesDebug & System IntegrationWork directly with the system validation team to debug firmware behavior across different Ethernet configurations, link states, and failure modesInvestigate and fix firmware issues in embedded C, leveraging deep understanding of how Layer 1 PHY, SERDES, FEC/PCS, MAC, and retimer components interactServe as the connective tissue between firmware and system validation teams, triaging issues and driving them to resolution without long handoff loopsCustomer Bring-Up & Field SupportSupport customer bring-up and integration activities, including triaging field issues and coordinating fixes with internal teamsPartner with field applications engineers to diagnose and resolve deployment issues quicklyFirmware Feature DevelopmentContribute to firmware feature development for SERDES configuration, link training, equalization, and diagnosticsPartner with SoC, field applications, and platform teams across the full product lifecycleHelp bring new Taurus products from initial silicon bringup through customer deploymentBasic QualificationsBachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field5+ years of experience in firmware development or embedded systems engineeringHands-on experience with Ethernet at the system or device level: Layer 1 PHY, SERDES, retimers, gearboxes, NICs, switches, or related devicesSolid embedded C/C++ skills and comfort working in a firmware codebase on real hardwareAbility to debug across the hardware/software boundary: register accesses, embedded SDKs, link state machines, PHY telemetry, debug print logsFamiliarity with Linux development tools: gcc/clang, make, bash, gdb, gitStrong communication skills and comfort working in a fast-moving environment where the problem in front of you may not have a clean solutionPreferred QualificationsExperience with switch or NIC management software, SAI, or OpenBMCKnowledge of PMA, FEC, or other PHY-layer subsystems beyond the SERDESBackground with retimer or gearbox firmware or SDK/API developmentPython scripting for debug, test automation, or data analysisExperience with lab equipment: BERT, oscilloscopes, Viavi/Lecroy/Exfo/Keysight/Tektronix or similarUnderstanding of signal integrity: equalization, jitter, eye diagrams, link marginPrior experience mentoring engineers or leading debug efforts across teamsSalary range is $133,200 to $185,000 depending on experience, level, and business need. This role may be eligible for discretionary bonus, incentives and benefits.We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.