Density Fill PDK Development Engineer

Job Details Embark with us on a journey of growth and transformation as we create exceptionally engineered technology and bring AI everywhere. As a valued team member, your adaptability and attention to detail will contribute to our drive for results and relentless pursuit of quality, ensuring we meet our customers' needs with precision. Join us and build on our legacy of innovation and collaboration as we deliver world‑changing technology that improves the life of every person on the planet. Key Responsibilities Design, develop, and debug Fill components of Process Design Kits (PDKs) Provide algorithmic solutions using tools such as Calibre, ICV, and Pegasus to address density deficiencies and ensure manufacturability compliance. Collaborate with process developers, design rule owners, and end users to define requirements and implement state‑of‑the‑art solutions. Automate workflows to enhance efficiency, accuracy, and deployment across design teams. Develop comprehensive test cases and systems to validate software tools and ensure seamless integration with various design methodologies. Innovate and drive advancements in EDA tools and methodologies to meet the evolving needs of Intel's technology ecosystem. Partner with cross‑functional teams and external EDA vendors to define and implement new tool features and methodologies. Maintain documentation, including training materials and user guides, to support customers and ensure robust deployment. Candidate Traits Proven track record of collaborating across multiple internal and external teams to deliver optimal solutions. Exceptional analytical and problem‑solving skills with the ability to address cross-disciplinary challenges. Strong written and verbal communication skills, with the ability to present complex technical concepts clearly. Minimum Qualifications Proficiency in scripting languages such as Python, Tcl, or Perl for automation. Expertise in EDA tools, including Calibre, ICV, or Pegasus, with strong skills in developing and debugging rule decks (e.g., SVRF/TVF, PXL, PVL/PVTCL). Solid understanding of semiconductor device physics, process technology, and design rules. Experience in developing algorithmic solutions for physical design challenges in advanced manufacturing nodes. Strong knowledge of Unix/Linux platforms and computing environments. Preferred Qualifications Experience with advanced physical verification techniques, including DRC, and density/fill modules. Familiarity with custom layout tools such as Cadence Virtuoso or Synopsys Custom Designer. Deep understanding of technology scaling challenges and their impact on physical design rules. Job Type Experienced Hire Shift Shift 1 (United States of America) Locations Primary Location: US, Oregon, Hillsboro Additional Locations: US, Arizona, Phoenix; US, California, Santa Clara; US, Texas, Austin Business Group Intel Foundry strives to make every facet of semiconductor manufacturing state‑of‑the‑art while delighting our customers -- from delivering cutting‑edge silicon process and packaging technology leadership for the AI era, enabling our customers to design leadership products, global manufacturing scale and supply chain, through the continuous yield improvements to advanced packaging all the way to final test and assembly. We ensure our foundry customers' products receive our utmost focus in terms of service, technology enablement and capacity commitments. Employees in the Foundry Technology Manufacturing are part of a worldwide factory network that designs, develops, manufactures, and assembly/test packages the compute devices to improve the lives of every person on Earth. EEO Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation or any other characteristic protected by local law, regulation, or ordinance. Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel. Annual Salary Range

$111,030.00 - 211,200.00 USD

Work Model This role will be eligible for our hybrid work model which allows employees to split their time between working on‑site at their assigned Intel site and off‑site. Job posting details (such as work model, location or time type) are subject to change. Additional Information Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter. #J-18808-Ljbffr Intel