PD-Power Integrity Sr. Staff Engineer
Intelliswift
\ Basic Qualifications: • Minimum of 3 - 10 years of experience in the following: o RTL2GDSIIon advanced technology nodes (7nm and below) o Low power implementation and signoff, power gating, multiple voltage rails, UPF/CPF. o Power constraints generation and validation, power analysis, interface with power integrity analysis tools. o TCL, Python and/or Perl programming. o EDA tools like DesignCompiler/Genus, Primetime/PrimePower, ICC2/Innovus, Redhawk/Voltus • Bachelor’s Degree or equivalent work experience (12 years) or an Associate’s Degree with 6 years of work experience. Preferred Qualifications:
- Experience running power analysis in vector and vector-less modes and achieving optimal QoR on low power designs
- Knowledge of static timing analysis, power analysis and concepts, defining timing and power constraints exceptions, switching activity definitions and simulation vectors
- Experience with power integrity analysis at block level or top level, including EM, IR & ESD analysis, power reduction techniques in SOC design
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