Analog IC Layout Engineer for Brain-Interface SoC (Equity)
$83k - $139kNeuralink
Neuralink is seeking an Analog IC Layout Engineer in South San Francisco to design state-of-the-art layouts for mixed-signal and analog circuits. The candidate should have over 2 years of experience in IC layout design, especially with FinFET technologies. Responsibilities include reviewing layouts and verifying IC mask layouts. The position offers a competitive salary range of $83,000 - $139,000 and excellent benefits including medical, dental, vision insurance, and equity compensation. #J-18808-Ljbffr Neuralink
Vacancy posted 3 days ago
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