Senior HSIO Architect: PCIe/UCIe & SerDes Lead

TylSemi in San Jose is seeking a High-Speed IO Architect to lead the architecture of high-speed interfaces across product families. You will drive key decisions on SerDes architecture and UCIe integrations while collaborating with engineering teams and vendor partners. The ideal candidate has over 15 years of experience, including significant expertise in PCIe and UCIe standards, alongside a strong track record in managing complex IP integrations. #J-18808-Ljbffr