Senior Technical Manager - FPGA

Job TitleLeadership Role in FPGA DevelopmentBasic QualificationsEducation Requirements:Bachelor's degree in Engineering or equivalent experience plus a minimum of 8 years of relevant supervisory experience; or Master's degree plus a minimum of 6 years of experience.Clearance Requirements:Ability to obtain a Department of Defense Secret security clearance is required at time of hire. Applicants selected will be subject to a U.S. Government security investigation and must meet eligibility requirements for access to classified information. Due to the nature of work performed within our facilities, U.S. citizenship is required.Responsibilities for this PositionLeadership ScopeProvide direct supervision for assigned personnel, including individual contributors embedded on product teams and, as organizationally assigned, team or technical managers within the function. In this matrixed environment, staff may support multiple programs and receive day-to-day task direction from program leadership while this role retains functional people-leadership accountability.Translate department vision and approved priorities into clear functional objectives, operating mechanisms, talent plans, and execution expectations in coordination with the Senior Engineering Manager and engineering leadership.Develop, train, and coordinate assigned managers and team leads so that they consistently apply leadership expectations, approved workforce plans, technical standards, performance practices, and employee-development approaches.Partner with business, program, and engineering leaders to maintain visibility to functional capability and staffing needs across multiple programs; recommend actions that support near-term program commitments and approved growth priorities.Primary ResponsibilitiesLead the FPGA function responsible for architecture, design, implementation, verification, qualification support, release, and sustainment of programmable logic used in airborne systems.Develop and maintain the functional demand and capacity view for FPGA, using program forecasts, specialized skill needs, utilization, attrition, and approved initiatives to identify staffing gaps and recommend hiring, development, or deployment actions.Coordinate approved requisition planning, candidate selection, onboarding, internal movement, and staffing deployment to place the right capability on the right work at the right time.Lead performance management and employee development for direct reports; contribute to department talent calibration, succession planning, recognition, retention, and the identification and growth of future technical and people leaders.Provide technical leadership and establish execution expectations for assigned FPGA development work, balancing performance, resource utilization, power, schedule, producibility, and lifecycle supportability.Ensure FPGA design and verification activities meet applicable customer, program, quality, safety, cybersecurity, configuration-management, and airworthiness requirements.Drive disciplined engineering practices including requirements allocation and traceability, architecture definition, coding standards, simulation, review, timing closure, hardware/software co-design, independent verification, and release readiness.Partner with Systems, Software, Hardware, Test, Cybersecurity, Quality, Program Management, and business leaders to coordinate interfaces, integration priorities, staffing recommendations, technical risk, obsolescence, and delivery commitments.Use objective measures to monitor execution and support continuous improvement, including demand-versus-capacity, staffing fulfillment, requirements maturity, verification completion, coverage, defect trends, timing margins, resource utilization, and release readiness.Lead technical reviews and contribute to estimates, make/buy decisions, technology roadmaps, tool and IP strategy, bid and proposal activity, and continuous improvement.Minimum QualificationsBachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical discipline plus a minimum of 8 years of relevant engineering and supervisory experience; or a Master's degree plus a minimum of 6 years of relevant experience.Demonstrated engineering leadership experience, including responsibility for people development, performance management, workload planning, staffing coordination, and execution outcomes.Demonstrated success developing technical professionals and coordinating work in a matrixed product and functional organization.Demonstrated expertise with FPGA development lifecycles, VHDL and/or Verilog/SystemVerilog, simulation, synthesis, timing analysis, verification, configuration management, and hardware/software integration.Ability to obtain and maintain any security clearance or access authorization required for assigned programs.Preferred QualificationsMaster's degree in a relevant technical discipline.Experience with airborne or defense programs and development assurance standards such as DO-254, DO-330, ARP4754A, or comparable rigorous hardware development environments.Experience with UVM or equivalent verification methodologies, coverage-driven verification, formal methods, reusable IP, and FPGA toolchains from major vendors.Experience integrating FPGA designs with embedded software, high-speed interfaces, RF/digital subsystems, or board-level hardware.Experience with workload planning, program planning, customer technical interchange, earned value, or proposal leadership.Leadership CompetenciesBuilds accountable, inclusive teams through clear expectations, coaching, timely performance feedback, and intentional talent development.Communicates technical tradeoffs, workforce needs, program health, and decisions clearly to engineers, functional partners, program leadership, and business stakeholders.Balances mission, quality, schedule, cost, and technical risk; escalates early and drives practical closure.Operates with integrity, sound judgment, and disciplined stewardship of customer commitments and company resources.Salary NoteThis estimate represents the typical salary range for this position based on experience and other factors (geographic location, etc.). Actual pay may vary. This job posting will remain open until the position is filled.Combined Salary RangeUSD $18,192.00 - USD $191,101.00 /Yr.Company OverviewGeneral Dynamics Mission Systems (GDMS) engineers a diverse portfolio of high technology solutions, products and services that enable customers to successfully execute missions across all domains of operation. With a global team of 12,000+ top professionals, we partner with the best in industry to expand the bounds of innovation in the defense and scientific arenas. Given the nature of our work and who we are, we value trust, honesty, alignment and transparency. We offer highly competitive benefits and pride ourselves in being a great place to work with a shared sense of purpose. You will also enjoy a flexible work environment where contributions are recognized and rewarded. If who we are and what we do resonates with you, we invite you to join our high-performance team!Equal Opportunity Employer / Individuals with Disabilities / Protected Veterans