Design Verification Engineer
$143.8k - $230kBroadcom
Please Note:1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account)2. If you already have a Candidate Account, please Sign-In before you apply.Job Description:Design Verification EngineerBroadcom's ASIC Products Division (APD), a worldwide leader in the design of complex custom ASICs and embedded IP, is looking for an experienced verification engineer that will be responsible for modeling and verification activities related to complex digital and mixed signal (MXS) IP blocks used in Broadcom’s ASIC developments.The engineer will be responsible for defining verification plans and environment architecture, developing test cases and test bench components, coverage analysis and closure, and debug. This position may involve working with emulation and FPGA prototyping platforms and leading efforts in evaluating and driving the adoption of advanced verification methodologies/flows. The engineer will be expected to develop functional models to facilitate the block, system, and ASIC level verification. The candidate must work closely with the design teams and EDA vendors to accomplish the modeling and verification tasks.The candidate must have experience using SystemVerilog and UVM, designing verification components including UVM agents, checkers, and behavioral models. Experience with implementing and achieving coverage goals by developing random & directed test cases, and SystemVerilog Assertions. This engineer will be responsible for analyzing and debugging simulation failures at the RTL and gate-level. The engineer must be knowledgeable of RTL, gate-level netlists, and SDF and capable of analyzing such formats in the verification context.Requirements:12+ years of experience with verification concepts and architectures for complex digital and MXS circuitsExperience verifying designs at the block and system levels.Experience with complex digital and mixed-signal circuits (PLL, DLL, ADC, DAC)Experience debugging RTL and gate-level netlists, analyzing schematic diagrams of analog / MXS circuitsExperience using SystemVerilog and advanced verification concepts and methodologies (UVM, SVA)Experience with Synopsys, Cadence, and Mentor simulations toolsDemonstrated ability to plan and deploy complex, reusable, and scalable verification environmentsExperience with Perl/Python and Tcl or other scripting languagesExperience with version control systems (DesignSync, git)Superior writing, grammar, and verbal communication skillsExcellent problem solver; develops and employs automated processes where applicableWorked independently and in a global team and dynamic environment in a highly visible rolePossesses ability to learn and adapt to new tools and methodologies on the flyMust have legal authorization to work in the USIt is a plus if the candidate has expertise in one or more of the following areas:Experience with hardware design and debugExperience with emulation (Palladium, Veloce, Zebu) and FPGA (Xilinx) platformsFormal verification concepts / experience is a plusExperience with verifying iJTAG network using ICL and PDL in the Tessent tool a plusExperience with co-simulation a plusEducation and Experience required:BS in Electrical Engineering / Computer Engineering and 12+ years of related experience; or an MS in Electrical Engineering / Computer Engineering and 10+ years of related experience.Compensation and BenefitsThe annual base salary range for this position is USD 143,800.00 To USD 230,000.00As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.SummaryLocation: USA-CO Broomfield; USA-CA-San Diego-West Bernardo; USA-Colorado-Fort Collins-4380 Ziegler Road; USA-CA San Jose Innovation Drive; USA-CA Irvine Alton Parkway Bldg 1Type: Full time
$159.2k - $215.3k
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$138k - $197k
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$125.3k - $187.9k
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$122.6k - $170k
...the world.Come work at Amazon!We're hiring an ASIC Engineer within a high performance ASIC design team. This team is using industry leading methodologies... ..., and meeting the power objectives· Work with the verification team and participate in System level verification using...Permanent employmentLocal areaFlexible hours$159.2k - $215.3k
...the world. Come work at Amazon! The Role:As Senior RFIC PLL Design Engineer, you will engage with an experienced cross-disciplinary staff... ...edge silicon and III-V devices.- Mixed-signal design and verification techniques.- Hands on experience with RF test equipment such...Permanent employmentLocal areaFlexible hoursShift work$131.29k - $190.11k
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$125k - $180k
...Our cutting-edge solutions, powered by the Hermes64 RF SoC, are designed to enhance network energy efficiency while dramatically... ...solutions. The company is supported by a talented team of over 100 engineers spread across four global R&D facilities. With an extensive portfolio...Full time$103k - $145k
Job TitleSenior Design Quality EngineerJob DescriptionIn this role you Will be part of a team that is excited by the unique professional... ...risk management throughout the product life cycle.A Quality Engineer provides independent oversight of the design input process, design...Full timeWork at officeImmediate startRemote workWork visaRelocation package3 days per week$95k - $123k
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$180.4k - $270.6k
Company:Qualcomm Technologies, Inc.Job Area:Engineering Group, Engineering Group > DSP... ...Automotive roadmap. The Hexagon architecture is designed to deliver performance with low power... ..., static timing analysis, formal verification, PLDRC, clock domain crossing, and low...Work experience placementWork from home$140k - $229.8k
Company:Qualcomm Technologies, Inc.Job Area:Engineering Group, Engineering Group > ASICS... ...Snapdragon chip sets and is seeking Hardware Design engineers with solid ASIC design... ...correction codes, hardening, etcExperience in verification, modeling, test-planningEducation...Work experience placementWork from home$82.9k - $138.1k
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Job Title: Senior Staff SW Design Quality Assurance EngineerDepartment: Design Quality... ...leading Quality Assurance and Quality Engineering activities throughout the Software Development... ..., specifications, detailed design, verification and validation protocols and planning...Full timeWork experience placementWork at office$117.7k - $176.5k
Job SummaryThe Staff Design Quality Assurance Engineer is a senior quality leader responsible for ensuring compliant design controls, risk management, and verification & validation activities across the full medical device development lifecycle, including system, hardware...Full timeWork at office$116k - $140k
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