Senior EDA Timing & Tools Hardware Engineer

Intel

Intel Corporation in US (Santa Clara/Folsom/Hillsboro) seeks a Senior EDA Tools Hardware Engineer to develop transistor-level timing characterization flows for custom IPs and macros across advanced silicon technologies. The role emphasizes SPICE-based characterization, Liberty model generation, and large-scale automation using Synopsys NanoTime and Cadence Liberate. Hybrid work model offered in multiple US locations.

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Vacancy posted 4 days ago

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