DFT Engineer
Highbrow Technology Inc
location San Jose CA (Onsite 5 Days/Week) Experience with Hierarchical DFT Architecture Experience in Scan Insertion, test Muxing, ATPG, MBist & pre/post-layout simulation Expertise in Top Level DFT switching with DFT Architecture experience will add value Expertise in test clock strategy & muxing required Expertise in test timing constraints for shift, capture, mbist or any special mode & timing closure for these modes Familiar with low power testability, state tables, and components (LS, ISO, RET) Familiar with JTAG for board level interconnect testing Programming experience in Tcl & Perl is must Involvement in flow development is a plus 3-5+ years industry experience required Skill Set: BS or above in electrical engineering or computer engineering #J-18808-Ljbffr Highbrow Technology Inc
Vacancy posted 3 days ago
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