Wafer Fab Supervisor

Location: Rowland, CA (Onsite) Position Summary: The Wafer Fab Supervisor leads a team of process technicians and operators responsible for daily wafer fabrication operations across InP photonic device lines, specifically InP Buried Heterostructure (BH) DFB lasers and BH Gain Chips (GC). This role is accountable for safe, on-schedule, high-yield production across the fab process modules — photolithography, PECVD, dry etch, wet etch, and metallization — including the Mesa etch and MOCVD epitaxial regrowth support steps used to form the buried heterostructure. The Supervisor sets daily priorities, balances staffing and tool capacity, and ensures strict Process-of-Record (POR) discipline in a III-V cleanroom environment. Working closely with Process Engineering, Equipment Engineering, Quality, and Production Planning, the Supervisor drives throughput, cycle-time, and yield performance, directs escalation and root-cause response for process excursions, and develops technicians and operators through coaching, training, and clear performance expectations to sustain reliable, high-volume manufacturing. Responsibilities: Production Operations Management: Plan and direct daily wafer fab production across photolithography, PECVD, dry etch, wet etch, and metallization to meet weekly and monthly wafer-out, throughput, and cycle-time targets for InP BH DFB laser and BH GC products Set lot priorities and sequence hot lots, engineering wafers, and standard production lots in coordination with Production Planning to sustain high tool utilization Conduct shift handoffs and daily production meetings, and track work-in-process, tool status, and line constraints to proactively resolve bottlenecks Coordinate tool downtime, preventive maintenance, and repair priorities with Equipment Engineering to protect production schedule adherence Oversee supplies, consumables, and chemical and gas inventory for the fab areas, and escalates shortages that threaten the production schedule Review lot travelers, process records, and hold/release dispositions to ensure complete and accurate lot documentation Team Leadership & Development: Lead, schedule, and assign work to technicians and operators to maintain proper coverage across fab process areas and shifts Set clear performance expectations, provide regular coaching and feedback, and complete performance reviews; address performance and attendance issues in partnership with Human Resources Develop and maintain a training and certification program, including cross-training to build flexible coverage across litho, thin film, etch, and metallization modules Participate in hiring, onboarding, and retention of fab technicians and operators Promote a culture of ownership, accountability, and open communication across the team Process Control, Yield & Troubleshooting Oversight: Ensure adherence to POR, recipes, and work instructions, and review SPC charts and out-of-control events with process owners to confirm timely corrective action Direct escalation and response for process excursions and drift, and partner with Process Engineering to drive root-cause investigation and verified corrective actions Monitor yield, defect, and rework trends and work with Process Engineering and Quality to prioritize improvement actions Support DOEs, process qualifications, and NPI process runs by scheduling resources and coordinating tool and lot availability Safety, Compliance & Continuous Improvement: Enforce EHS requirements for chemical, process gas, and precious metal handling, cleanroom protocols, and equipment lockout/tagout; lead safety briefings and incident reporting and follow-up Ensure compliance with quality system, document control, and training record requirements Lead continuous improvement projects to improve throughput, cycle time, yield, cost, and cleanroom efficiency Maintain accurate production metrics and communicate performance, risks, and resource needs to fab management Education and Experience: Bachelor's degree in engineering, materials science, chemistry, physics, or related technical field preferred; associate degree with equivalent experience considered 8 - 12 years of experience in semiconductor/photonics wafer processing, with direct III-V/InP process experience 2 - 3 years of experience in a lead #J-18808-Ljbffr Sierra Wireless