VLSI Design Verification Lead - Pre-Silicon Excellence

• Provide leadership and direction for a team responsible for all phases of pre‑silicon design verification, including verification planning, testbench development, coverage closure, regression management, and sign‑off reviews.
• Define, own, and evolve design verification methodology, ensuring consistent, high‑quality verification practices across block, subsystem, and full‑chip scopes.
• Ensure development of robust SystemVerilog/UVM‑based environments, including stimulus, scoreboards, checkers, assertions, and functional coverage.
• Drive regression health, failure triage, root‑cause isolation, and closure of design issues in collaboration with logic design and architecture teams.
• Manage project deliverables, schedules, and staffing to meet program milestones and quality goals.
• Recruit, mentor, and develop engineers; set performance expectations and support career growth across junior through senior levels.
• Identify and drive opportunities for process improvement, reuse, automation, and efficiency in verification workflows.
• Communicate verification status, risks, and readiness clearly to management and cross‑functional partners.

Requirements Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent. Typically 10+ years of experience in VLSI design verification, with strong hands‑on background in pre‑silicon DV. Strong understanding of SystemVerilog and UVM‑based verification methodologies. Demonstrated technical leadership in design verification. Ability to lead engineers through influence and mentorship. Experience with verification planning, coverage‑driven verification, regression management, and sign‑off readiness. Proficiency with DV workflows using industry EDA simulation tools. Strong analytical and problem‑solving skills. Excellent written and verbal communication skills. ATS Optimization Keywords Below are skills and terms extracted directly from this job posting to improve Applicant Tracking System (ATS) visibility. This unique feature helps candidates tailor their applications more effectively — a feature exclusive to JobTailor job listings. Hard Skills SystemVerilog UVM design verification verification planning testbench development coverage closure regression management root-cause isolation functional coverage EDA simulation tools Soft Skills leadership mentorship communication analytical skills problem-solving project management collaboration process improvement influence career development Certifications & Qualifications Bachelor’s degree in Electrical Engineering Master’s degree in Electrical Engineering Bachelor’s degree in Computer Engineering Master’s degree in Computer Engineering Bachelor’s degree in Computer Science Master’s degree in Computer Science #J-18808-Ljbffr Jobtailor