ASIC Verification Engineer

Seeking a full-time remote ASIC Verification Engineer, the candidate will participate in the development of UVM environments, write and execute tests according to verification plans, and conduct formal verification of block-level RTL for high-performance computing and AI interconnect solutions. Key Responsibilities: Participate in development of UVM environments to verify RTL at block, unit, and SoC levels Write and execute tests according to verification plans Instrument test benches for functional and code coverage; collect and analyze coverage results Required Qualifications: B.S. Degree in Computer Engineering, Computer Science, or Electrical Engineering 3+ years' post-college experience in verification 3+ years' post-college experience in one or more scripting languages (TCL, Python, Perl, Shell-scripting) 3+ years' post-college experience validating complex SoCs that include multiple clock and reset domains Experience in UVM-based test bench development