Sr Principal CPU Microarchitect

Summary of Role

Drive the Next Wave of Computing Innovation at MIPS. At MIPS, we’re shaping the future of compute architecture with advanced IP that powers a wide range of applications. We take a disciplined, methodical approach to designing scalable, energy‑efficient solutions that meet demanding power, performance, and area goals. Our team spans architecture, performance modeling, design, verification, implementation, and software optimization for our customers. We’re seeking a seasoned CPU microarchitect who brings hands‑on RTL development experience and a track record of technical leadership.

Essential Responsibilities

• Own or participate in the creation of a microarchitectural specification for a major block from early exploration through microarchitectural definition in conjunction with the performance modeling team and arriving at a detailed specification RTL design of the major functional block.
• Define, implement, and converge the block to project requirements (performance, timing, power, area, schedule).
• Support the verification team for test bench development, test plan development, and test content development, including performance verification.
• Work with physical design teams and design-for-testability teams to implement and converge physical design and testability.

Other Responsibilities

• Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs.

Required Qualifications

• Minimum BS and 15+ years of relevant industry experience.
• Experience with CPU microarchitecture, in at least one of the following areas: instruction fetch, branch prediction, instruction decode, instruction scheduling, out of order execution, register renaming, integer or floating point execution, exception handling, load/store execution, cache design, or memory management unit.
• Experience with Verilog, System Verilog, or VHDL.
• Experience with commercial simulators and debugging tools.
• Expert in logic design.

Preferred Qualifications

• Experience with timing, power and area trade-offs in CPU microarchitecture.
• Experience with high performance CPU microarchitecture techniques.
• Experience with ISAs such as RISC‑V, ARM‑v8, or x86.
• Experience using scripting languages and regular expressions.
• Programming experience with assembly, C, or C++.
• Experience with emulators is a plus.

Expected Salary Range

$171,000.00 - $296,000.00. The exact salary will be determined based on qualifications, experience and location.

Equal Opportunity Employer

GlobalFoundries is an equal opportunity employer, cultivating a diverse and inclusive workforce. We believe having a multicultural workplace enhances productivity, efficiency and innovation while our employees feel truly respected, valued and heard. All qualified applicants are considered for employment regardless of age, ethnicity, marital status, citizenship, race, religion, political affiliation, gender, sexual orientation and medical and/or physical abilities.