Senior DSP SW Engineer

Job Description

Job Description

Ready to make connectivity from space universally accessible, secure and actionable? Then you’ve come to the right place!

E-Space is bridging Earth and space to enable hyper-scaled deployments of Internet of Things (IoT) solutions and services. We are building a highly-advanced low Earth orbit (LEO) space system that will fundamentally change the design, economics, manufacturing and service delivery associated with traditional satellite and terrestrial IoT systems.

We’re intentional, we’re unapologetically curious and we’re 100% committed to innovate space-based communications and deliver actionable intelligence that will expand global economies, protect space and our planet and enhance our overall quality of life.

Own a 5G NR modem PHY subsystem for satellite NTN, delivering algorithms and firmware that meet agreed performance, power, and real-time requirements through integration and silicon bring-up. 

• Independently own the design, implementation, and integration of a 5G NR physical-layer (PHY) subsystem for satellite non-terrestrial networks (NTN), translating system requirements into algorithms, firmware interfaces, and measurable acceptance criteria. 

• Define and execute PHY/link-level simulation studies for the subsystem, select representative NTN operating conditions and corner cases, and resolve tradeoffs among link performance, implementation complexity, latency, memory, and power. 

• Deliver and optimize production DSP firmware for the subsystem, including real-time processing, data movement, and accelerator interaction. Work with ASIC engineers to reduce power through efficient computation, memory access, and power-state control while meeting real-time deadlines; diagnose performance bottlenecks and integration failures. 

• Own the subsystem's reference models and ASIC test-vector deliverables, including fixed-point behavior, interface specifications, automated comparisons, and regression coverage agreed with design and verification teams. 

• Contribute to SystemC transaction-level modeling (TLM) and high-level synthesis (HLS) development, including synthesizable implementations, with guidance from engineers experienced in these flows. 

• Drive the subsystem's pre-silicon verification and new-chip bring-up activities, define tests and expected results, and resolve discrepancies across models, firmware, and hardware. 

• Review algorithms, code, and test plans; mentor less experienced engineers and coordinate technical dependencies with ASIC, verification, and software teams. 

Anticipate subsystem integration risks and dependencies, make considered technical decisions, and engage the right engineers to drive issues to verified resolution. Make commitments and acceptance criteria explicit, communicate risks early, and follow through until the agreed work is complete. 

• Demonstrated ability to design and deliver communication DSP algorithms, explain their performance limits, and make implementation tradeoffs using simulation and measured results. 

• Ability to implement and debug numerical algorithms in C/C++, and to use Python or MATLAB for simulation, analysis, and test automation. 

• Practical experience implementing 5G NR PHY functions and interpreting the relevant 3GPP specifications, with the ability to turn requirements into subsystem designs and validation plans. 

• Demonstrated experience converting floating-point algorithms to fixed-point implementations, selecting numerical precision, and validating performance against a reference model. 

• Demonstrated ownership of real-time embedded DSP software, including profiling, optimization, hardware/software integration, and systematic debugging on an embedded target. Experience developing low-power firmware in collaboration with ASIC designers and evaluating power, performance, and memory tradeoffs. 

• Ability to build reproducible tests, use version control, document technical assumptions and results, and explain discrepancies during code and design reviews. 

• Evidence of independently delivering a PHY subsystem or comparable modem capability through integration and validation, and improving others' work through technical reviews or mentoring. 

• Typical background: BS with 7+ years, MS with 5+ years, or PhD with 3+ years of relevant experience in DSP, wireless communications, or embedded modem development, with a degree in Electrical Engineering, Computer Engineering, or a related field; equivalent demonstrated expertise is also welcome. These are guidelines, not mandatory minimums. Relevant doctoral research may count toward experience; demonstrated implementation and delivery capability remains essential. 

• Experience building SystemC TLM models for hardware/software integration or performance analysis, or delivering synthesizable HLS blocks with verified functional behavior and evaluated latency, throughput, and resource use. 

• Experience with 5G NR or NTN algorithms and specifications, satellite channel modeling, or compensation for Doppler and timing effects. 

• Experience taking modem functions through pre-silicon verification and silicon bring-up, including correlation of simulation results with hardware measurements. 

• Experience with 5G NR MAC, PHY/MAC interfaces, scheduling interactions, or HARQ procedures. 

• Experience implementing and optimizing algorithms on vector DSPs, including SIMD intrinsics, vectorization, and efficient memory access. 

• Experience validating ASIC power-management features through firmware, including clock or power gating, retention, and sleep/wake transitions under real-time constraints. 

Your subsystem meets agreed performance, power, and real-time requirements. Reference models and tests support reproducible verification, and discrepancies across models, firmware, and hardware are resolved through integration and silicon bring-up. 

This is a fast-paced, high-impact environment - flexibility to occasionally work extended hours or weekends during critical periods is expected.

This is a full time, exempt position, based out of our Santa Clara, CA location. The target base pay for this position in Santa Clara, California is $140,000 - $200,000 annually.  The total compensation package will be determined by various factors such as your relevant job-related knowledge, skills, and experience and location. 

We are redefining how satellites are designed, manufactured and used—so we’re looking for candidates with passion, deep knowledge and direct experience on LEO satellite component development, design and in-orbit activities. If that’s your experience – then we’ll be immediately wow-ed.

E-Space is not currently able to provide employment sponsorship for candidates who do not hold work authorization for the location of this role.  

Why E-Space is right for you:

As a member of our team, you will play a crucial role in driving our success.  Our team members have a strong sense of dedication and responsibility; this includes a strong commitment to our mission to create an entirely new suite of global capabilities to improve lives, business efficiencies and build a smarter planet. This means that there will be times when extra hours, including nights and weekends, may be needed to meet critical deadlines and mission goals.  In return, we offer a dynamic work environment with opportunities for professional growth and development and the chance to make a meaningful impact in a high-growth industry.  

We want you to make the most of your journey at E-Space. That’s why we support and invest in the physical, emotional and financial well-being of our team members and their families. Some of what you can expect when working at E-Space:

• An opportunity to really make a difference

• Sustainability at our core

• Fair and honest workplace

• Innovative thinking is encouraged

• Competitive salaries

• Continuous learning and development

• Health and wellness care options

• Financial solutions for the future

• Optional legal services (US only)

• Paid holidays

• Paid time off

We may use artificial intelligence (AI) tools to support parts of the hiring process, such as reviewing applications, analyzing resumes, or assessing responses and identifying potential inconsistencies or verification signals in application materials based on available information. These tools assist our recruitment team but do not replace human judgment. Final hiring decisions are ultimately made by humans. If you would like more information about how your data is processed, please contact us.