Senior Design Verification Engineer

Talent Acquisition Lead @ Quest Global | Technical Recruiting We offer flexible work options, including hybrid/Remote arrangements, to support the needs of the role and align with company policies. This position is located in Sunnyvale California or Austin Texas . Who We Are Quest Global delivers world‑class end‑to‑end engineering solutions by leveraging our deep industry knowledge and digital expertise. By bringing together technologies and industries, alongside the contributions of diverse individuals and their areas of expertise, we solve problems better, faster. The multi‑dimensional approach addresses the most critical and large‑scale challenges across the aerospace & defense, automotive, energy, hi‑tech, healthcare, medical devices, rail and semiconductor industries. We seek humble geniuses who believe engineering can make the impossible possible, innovators inspired by technology and innovation, perpetually driven to design, develop, and test as a trusted partner for Fortune 500 customers. We recognize that what we engineer is a brighter future for all. If you want to contribute to meaningful work and be part of an organization that truly believes when you win we all win, and when you fail we all learn, we’re eager to hear from you. Experience Level Senior Design Verification Engineer (6–14 years of relevant experience) Design Verification Lead (15+ years of relevant experience) What You’ll Do Develop functional tests based on verification test plan Drive Design Verification to closure based on defined verification metrics on test plan, functional and code coverage Debug, root‑cause, and resolve functional failures in the design, partnering with the design/arch team Collaborate with cross‑functional teams (Design, Model, Emulation and Silicon validation teams) to ensure the highest design quality What You Will Bring Experience using constrained‑random, coverage‑driven verification or C/C++ verification Experience verifying an IP block using standard Design Verification (DV) techniques Experience with EDA tools and scripting (Python, TCL, Perl, Shell) used to build tools and flows for verification environments Understanding in at least one of: computer architecture, CPU, GPU, networking, interconnects, fabrics or similar designs Experience debugging failures to the RTL level, closing out bug fixes, using Verdi or equivalent debug tools Experience with revision control systems such as Mercurial, Git, or SVN Experience working in a CPU/GPU environment Seniority Level Mid‑Senior level Employment Type Full‑time Job Function Engineering Services and Semiconductor Manufacturing #J-18808-Ljbffr Quest Global