EDA Methodology Architect
$168k - $264.5kNVIDIA
NVIDIA's success builds on a foundation of industry leading hardware. We achieve distinction through extensive design optimization, including combining the best of external EDA with highly optimized, internal EDA tools. Our team develops these tools by fusing advances in parallel computing, machine learning, and specialized algorithms for VLSI design. We are seeking a Senior P&R Methodology Architect to define and own the next generation RTL2GDS flow for advanced nodes (3nm and below) and high performance GPU, CPU and SoC designs. You should have deep, hands‑on experience across the full RTL2GDS flow, with expertise in key stages such as RTL, DFT, synthesis, placement, optimization, CTS, routing, and signoff. Creativity and self‑drive to explore is required. Our engineers enjoy unusually high intellectual freedom and the ability to explore broad roles. If you like to work across many technical areas and see your successes directly realized in the world's best AI hardware, it does not get any better than this! What you’ll be doing: Working directly with core P&R engine developers to define real‑world optimization problems, shape requirements and roadmaps, and provide detailed feedback on engine behavior, QoR, and scalability. Defining and rolling out next‑gen flows, including refactoring legacy flows and consolidating ad‑hoc solutions into scalable, maintainable frameworks used across multiple design teams. Designing and running rigorous A/B and multi‑variant experiments to compare flows, engines, and tool settings. Developing Python‑based analytics and ML/GenAI techniques to mine large QoR datasets, recommend flow settings, and automate analysis. Performing deep root‑cause analysis on QoR issues across engines, tools, and flows, and driving methodologies to resolve the “long tail” of timing closure and performance limiters. Partnering with architecture, RTL, DFT, synthesis, physical design, power, signoff, and CAD/methodology teams as a key technical leader and bridge. Driving aggressive PPA and schedule targets and the adoption of new tools and flows across the company. What we need to see: BS or MS in Electrical Engineering, Computer Engineering, Computer Science, or equivalent experience. 8+ years physical design experience, with deep expertise in industry standard tools like ICC2/Innovus, PrimeTime/Tempus, etc. Extensive hands‑on P&R experience taking complex blocks or chips to tape‑out with aggressive PPA targets. Proven skills in Python, Perl, and TCL flow development. Strong problem‑solving skills and self‑motivation, demonstrated by simplifying complex, cluttered environments and modernizing legacy tools and processes. Excellent communication and collaboration skills, with a track record of driving consensus and solving complex issues across distributed design, CAD, and R&D teams. Ways to stand out from the crowd: Experience collaborating with EDA or internal R&D teams on core engine development, co‑defining features, developing benchmarks and leading validation and deployment. Expertise in designing and automating A/B tests and large‑scale regressions, and analyzing large QoR datasets to understand trends and drive root‑cause analysis. Background in advanced‑node and large‑scale designs with exposure to advanced‑node challenges (DFM, variability, EM/IR, power integrity). Hands‑on experience applying AI/ML or GenAI to physical design, QoR analysis, or flow development will be a strong plus. If working hands‑on from early architecture and RTL through silicon, and serving as the connector between core developers, methodology teams, and users, excites you, we want to hear from you. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 168,000 USD - 264,500 USD for Level 4, and 196,000 USD - 310,500 USD for Level 5. You will also be eligible for equity and benefits. NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law. #J-18808-Ljbffr NVIDIA
- NVIDIA Gruppe is seeking an experienced individual to develop and optimize semi‑custom RTL‑to‑GDS methodologies in Santa Clara, California. This role requires 8+ years of experience in physical design and strong leadership skills in a collaborative environment. Compensation...Suggested
$168k - $310.5k
NVIDIA Gruppe is seeking a Senior P&R Methodology Architect to define the next generation RTL2GDS flow for cutting-edge designs. This role involves collaboration with core developers and requires deep expertise in physical design processes. Candidates should have experience...Suggested- NVIDIA is seeking a Senior P&R Methodology Architect to define and own the next-generation RTL2GDS flow for advanced nodes in Santa Clara, California. This role requires deep hands-on experience across the full RTL2GDS flow, with responsibilities including defining optimization...Suggested
$220.2k - $330.4k
..., and more. Position: Signal Integrity Architect We are seeking an experienced Signal Integrity... ..., etc.). Experience in developing SI methodologies from die to system, with lab correlation... .../Linux environments and experience with EDA tools through scripting. Strong...SuggestedWork experience placementWork from home- ...Principal ASIC Architect Sunnyvale, CA About our company - Tensordyne (formerly Recogni) AI is reshaping our world,... ...applicable. Lead the evaluation of new silicon IP technologies, EDA tools and methodologies to enhance the product and improve the efficiency of our...SuggestedRemote work
$227k - $320k
Senior Staff Architect, Silicon, Google Cloud Sunnyvale, CA, USA Apply Bachelor’s degree... ...development. Experience in identifying silicon methodology changes, architecting a solution, and... ...licensed Electronic Design Automation (EDA) tools, custom tooling, and emergent...Full timeWorldwide$157.5k - $292.5k
...Architect At Cadence, we hire and develop leaders and innovators who want to make an impact... ...and influencing next-generation EDA & Agentic-AI solutions. This role demands... ...optimizations, and deployment of cutting-edge methodologies for Synthesis, P&R, STA, IR Drop, and...$157.5k - $292.5k
...world of technology. Overview The Architect will serve as a technical leader within... ...engagements and influencing next-generation EDA & Agentic-AI solutions. This role... ...optimizations, and deployment of cutting-edge methodologies for Synthesis, P&R, STA, IR Drop, and...$187k - $270.7k
...seeking a highly experienced Clocking Architect to lead the definition, design, and integration... ...gating policies, low-power clocking methodologies, and dynamic frequency scaling... ...investment. Access to Altera's world-class EDA infrastructure, IP libraries, and...Local areaFlexible hoursShift workNight shift$164.47k - $269.1k
...the future of high-performance networking silicon. Our team architects next-generation networking solutions that enable hyperscale data... ...across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and...Local areaImmediate startShift work$170.5k - $315.49k
...environments and driving closure in partnership with system architects and cross-functional teams. We are looking for someone who... ...solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon),...Local areaImmediate startShift work$164.47k - $269.1k
...the future of high-performance networking silicon. Our team architects next-generation networking solutions that enable hyperscale data... ...across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and...Local areaImmediate startShift work- ...Details Job Description We are seeking an experienced Silicon Architect to lead the definition and architectural development of... ...protocols (CHI, ACE). Compute cluster microarchitecture and scaling methodologies. Preferred Qualifications: 1. Experience with datacenter,...Local areaShift work
- ...the future of memory interface technology at scale. As a key architect within the AMD Circuit Technology Design Group, you will influence... ...of advanced CMOS technologies and modern design methodologies. Track record of making sound technical decisions in complex...WorldwideFlexible hours
- ...skills. Your background in EE/CS, coupled with your experience with EDA tools like DC, ICC2, Fusion Compiler, PT, ICV and RedHawk makes... ..., timing closure, IR‑drop/EM analysis, LVS/DRC, and related methodologies. Demonstrated experience developing cutting‑edge flows and...
- Compute Kernel Performance Architect NVIDIA is seeking a Compute Kernel Performance Architect with a unique blend of skills: someone... ...designers, silicon validation engineers — to ensure power stress methodologies are aligned from pre‑silicon simulation through post‑silicon...
- Senior Applied Power Architect - GPU NVIDIA is known as a world leader in providing energy‑efficient high‑performance products, and... ...products. Responsibilities You will be responsible for inventing methodologies, features and techniques to address electrical/speed/power...
- Synopsys, Inc. in Sunnyvale, California, is seeking a Sr Architect for R&D Engineering focused on developing EDA software. The ideal candidate has extensive experience in building EDA tools, particularly in custom IC design automation. Responsibilities include architecting...
$152k - $241.5k
About the Role We are seeking a Senior Hardware SoC Architect to help define next‑generation SoC architectures that combine NVIDIA GPUs... ...in SystemC modeling, scripting, and a passion for improving methodologies and automation to boost team efficiency. Responsibilities...$224k - $356.5k
What you’ll be doing Research, architect, implement, and evaluate mechanisms for capturing and studying complex applications suitable... ...more years of relevant experience Experience with CPU workload methodology: state capture and replay, trace analysis, SimPoint, etc. Knowledge...- NVIDIA Gruppe is seeking a Senior Hardware SoC Architect in Santa Clara to define next-generation SoC architectures that integrate GPUs... ...across teams and focus on clock, reset, and power management methodologies. Ideal candidates will have a BS/MS in EE/CE, extensive...
$152k - $241.5k
...data into actionable insights. You will architect, develop, and maintain infrastructure that... ...infrastructure. Familiarity with EDA (Electronic Design Automation) workflows... ...of software engineering principles and methodologies such as OOP, CI/CD. Ability to translate...- ...-end design implementation. You will be responsible for design methodologies, collaborating with teams to solve implementation issues while... ...related fields with at least 4 years of experience. Proficiency in EDA tools is required, along with strong interpersonal and...
$198.6k - $297.8k
...General Summary: We are seeking a Senior SoC Performance Architect to lead server CPU workload analysis, performance modeling,... ...and drive cross-functional optimization plans. ~ Define methodologies, metrics, and KPI frameworks for workload analysis, performance...Work experience placementWork from home$164.8k - $226.6k
...Summary The Principal Hardware Signal Integrity/Power Integrity Architect is accountable for system-level electrical design and for establishing signal and power integrity simulation methodologies that underpin the development of hardware platforms used for...$165.5k - $230.6k
...Principal Platform Architect It all started in sunny San Diego, California in 2004 when a visionary engineer, Fred Luddy, saw the... ...consultants, using our ecosystem of partners, our leading practices, methodologies and tools based on our experiences from 1000's of customer...Work at officeRemote workFlexible hours- ...Role - Sr. ServiceNow Architect Need a visa independent profile only Location - Santa Clara, CA We are seeking a highly... ...Business Rules, Script Includes). ~ Experience with Agile methodologies and writing user stories for development teams. ~...
- ...role We are looking for an initiative-taking Vector Compute Architect Intern to join our advanced architecture team working on... ...optimization. Strong knowledge of RTL development and verification methodologies. Experience with architecture modeling and performance...Internship
$134.95k - $224.92k
...experience, MS with 10 years' experience, or PhD with 7 years' experience Extensive commercial experience with EDA, semiconductors design and methodologies Demonstrated leadership with a track record of delivering state-of-the-art results on complex problems...Flexible hours$200.4k - $286k
...work alongside world-class engineers to architect next-generation silicon solutions that redefine... ..., and high-speed interface validation methodologies. ~ Knowledge of general IO standards... .... Experience collaborating with EDA/software teams to optimize tool flows,...Local areaShift work
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