FE Engineer

Imagine what you can do here. Apple is a place where extraordinary people gather to do their lives best work. Together we create products and experiences people once couldn't have imagined, and now, can't imagine living without. It's the diversity of those people and their ideas that inspires the innovation that runs through everything we do. Description APPLE INC has the following available in Austin, Texas. Work closely with the Front-End and Physical Design teams to drive methodology changes to improve performance, power and area for the next generation GPU designs and recommend design/methodology changes to absorb the updates. Work with the Apple custom design teams to analyze the standard cell and memory hard-IP offerings and recommend usage to the graphics FE/PD teams. Drive design of custom cells tailored specifically for GPU design requirements. Work with power teams to analyze GPU power and make recommendations for power reduction across architecture and gate-level design. 40 hours/week. Minimum Qualifications Master's degree or foreign equivalent in Computer and Electrical Engineering or related field and 3 years of experience in the job offered or related occupation. 3 years of experience with each of the following skills: Working with threshold voltage, power, device variation, parasitics, noise, EA (Electrical Analysis), and timing concepts. Utilizing the commonly used industry tools in semiconductor design like Scripting Language (Python, Perl or TCL) for execution, analysis, and debug of designs. Utilizing the Industry Standard Physical Design Tools (Innovus or ICC (integrated Circuit Compiler)), to perform multiple complex logical functions and convert them to actual physically realizable designs that meet the Performance, power and area (PPA) targets. Utilizing the Industry Standard Timing Closure tools such as Tempus or Primetime to ensure the design meets the performance and electrical requirements. Understanding Synthesis tools from Synopsys, Cadence or Mentor to take RTL Code that captures the complex functions executed by a particular design and maps them into technology specific collection of gates that meets the function while optimizing them for Performance, power and area (PPA). Utilizing Low Power Design Concepts to optimize the power, performance, area of the design pivot, and to improve the Performance, power and area (PPA) of the design. Utilizing Data Analysis and Visualizations to help convert complex large data gathered from designs during the optimization cycle and convert them into meaningful insights. Preferred Qualifications N/A #J-18808-Ljbffr Socket.dev