Silicon Engineer, Power Analysis, DeepMind

Silicon Engineer, Power Analysis, DeepMind

Share Silicon Engineer, Power Analysis, DeepMind

corporate_fare DeepMind place Mountain View, CA, USA

• 7 years of experience working in ASIC power analysis & optimization, including experience with production chips
• Experience in tape-outs of chips
• Experience interacting and collaborating with silicon foundries and other external vendors for the tapeout process
• Experience with Verilog and industry-standard EDA tools for power analysis & optimization design (e.g., PP-RTLA, PowerArtist, PrimeTime-PX, PrimeTime, Cadence Innovus, Synopsys Fusion Compiler)
• Experience with scripting languages (e.g., Perl, Tcl) for automation of power analysis & optimization flows

Preferred qualifications:

• Master's degree or PhD in Electrical Engineering, Physics or related field

About the job

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Artificial intelligence will be one of humanity’s most transformative inventions. At Google DeepMind, we are a pioneering AI lab with exceptional interdisciplinary teams focused on advancing AI development to solve complex global challenges and accelerate high-quality product innovation for billions of users. We use our technologies for widespread public benefit and scientific discovery, ensuring safety and ethics are always our highest priority.

We are pushing the boundaries across multiple domains. Our global teams offer diverse learning opportunities and varied career pathways for those driven to achieve exceptional results through collective effort. Individual pay is determined by factors including job-related skills, experience, and relevant education or training.

US: $217000 - $236000 (USD) + 15% bonus target

• Architect advanced technology node power solutions and establish use case budgets with block and full-chip estimations.
• Lead and drive the automation and integration of power analysis processes—including RTL power analysis, optimization, IP selection, physical design, and timing closure—into our automated flow.
• Apply hardware expertise to build, create, and integrate software components for automated early- and late-stage power analysis and optimization.
• Partner with systems power and cross-functional teams to define, execute, and advocate for power management and reduction methodologies from SoC architecture through sign-off.

Google is proud to be an equal opportunity and affirmative action employer. We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition (including breastfeeding), expecting or parents-to-be, criminal histories consistent with legal requirements, or any other basis protected by law. See also Google's EEO Policy , Know your rights: workplace discrimination is illegal , Belonging at Google , and How we hire .

Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting.

Equity is granted exclusively and discretionarily by Alphabet Inc. on the basis of an agreement concluded between you and Alphabet Inc. Alphabet Inc. is your sole contractual partner with respect to equity grants. GSU grants are not guaranteed, are discretionary, are subject to approval by the Alphabet Inc. board of directors or its delegate, the terms of the relevant Alphabet Inc. stock plan, and your grant agreement. They have no impact on statutory payments. Current or past grants do not confer an acquired right.