RISC-V Linux Kernel Architect (High-Performance Servers)

SiFive is seeking an experienced Linux kernel software architect to improve and debug the RISC-V Linux kernel, with emphasis on high core count server systems. You will patch upstream, collaborate with OpenSBI and Linux communities while working with system software teams. You will work with CPU architects, RTL engineers and emulation platforms, including FPGA, to advance core and system designs. The role requires strong debugging skills, familiarity with RISC-V, hypervisors, and a track record #J-18808-Ljbffr