Senior FPGA Engineer: Low-Latency Systems Lead
$225k - $325kP2P
DRW is seeking a Senior FPGA Engineer to join our trading teams in NYC, Chicago, or London. This role requires experience in FPGA hardware engineering and strong skills in RTL logic design. The candidate will participate in full development lifecycles and engage in critical tasks such as architecting new applications, evaluating hardware, and debugging in a lab setting. An attractive salary ranging from $225,000 to $325,000 is offered along with comprehensive benefits. #J-18808-Ljbffr P2P
Vacancy posted 4 days ago
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