Senior ASIC & Memory Architect for High Performance SOC
Apple Inc.
Apple Inc. in Santa Clara is seeking an experienced engineer to join our ASIC design team focused on memory subsystem architecture. You will drive RTL/micro-architecture, high‑performance memory designs, and DRAM controller/PHY development, including calibration and interconnect strategies. You will collaborate with performance and validation teams, document study results, and help publish insights that influence next‑generation Apple hardware, while shaping efficient memory hierarchies for SOCs. #J-18808-Ljbffr Apple Inc.
Vacancy posted 1 day ago
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