Microarchitect

We’re looking for microarchitects to own key blocks in the A-0 and A-1 systems. You will work alongside the architects to translate specifications into implementable RTL and then work with the PD teams to turn it into silicon. Ideal Background: Ideal candidates will have: Experience owning the microarchitecture of at least one block in multiple advanced node tapeouts Deep understanding of impact of microarchitecture upon PPA, and levers available to improve PPA Understanding of system level architecture and the impact of microarchitecture upon system architecture Understanding of integration of blocks into broader system Nice to Have: Experience with microarchitecture of AI chip blocks, especially matrix multiplication engines Knowledge of matrix multiplication engine numerics and effects upon microarchitecture Experience with microarchitecture at 5nm and below nodes Experience with physical design process at 7nm and below nodes #J-18808-Ljbffr Conductor