Process Integration Engineer | APTD

Position Overview As a Process Integration Engineer within APTD your responsibilities include but are not limited to developing and enabling deployment of advanced interconnect technologies. Successful development and deployment will ensure that products which use the developed technologies meet performance, cost, manufacturability, quality, reliability and schedule requirements. Also, you will have responsibility to work with peers and internal partners across organizations to coordinate the development and launch of new technologies and integration flows. This role is open to candidates at Process Engineer Levels 4, 5 or MTS. Responsibilities Collaborate with peers, internal teams, and external suppliers to develop innovative advanced packaging technologies. Deliver reliable, efficient packaging solutions on schedule with predictable performance. Define project timelines and validation plans to qualify new technologies. Enable smooth transitions from development and qualification through low‑and high‑volume production. Anticipate future trends and define technology roadmaps for advanced packaging solutions. Continuously develop technical and leadership skills through ongoing learning. Promote and enforce a culture of safety, compliance, and ethical behavior. Maintain procedures, training, and audit readiness to ensure regulatory and management system compliance. Required Experience 3+ years of professional experience in the semiconductor industry. MS or PhD in Electrical Engineering, Materials Science, Mechanical Engineering, Physics, Chemistry, or a closely related field, or equivalent professional experience demonstrating senior‑level technical capability. Professional experience in process integration, process development, advanced packaging, or closely related semiconductor technology domains within an R&D environment (IDM, foundry, OSAT, or equivalent). Additional Qualifications (Preferred) End‑to‑end ownership of integration solutions, from technology definition and process development through qualification and high‑volume manufacturing transfer. Deep, hands‑on expertise in advanced packaging and interconnect technologies, including 2.5D/3DIC integration, wafer‑level and fan‑out packaging. Practical experience with interconnect methods such as wirebond, microbump, and/or hybrid bonding. Strong semiconductor technology background with experience in memory (DRAM, NAND) and/or logic devices. Proven strength in process integration problem‑solving using DoE, data‑driven decision making, and root‑cause analysis. Job Profile(s) Semiconductor Process Engineer 4 - Semiconductor Process Eng MTS Relocation Level: TBD Benefits Micron offers a choice of medical, dental and vision plans in all locations, enabling team members to select the plans that best meet their family healthcare needs and budget. Additional programs provide income protection if you are unable to work due to illness or injury, and paid family leave. A robust paid time‑off program and paid holidays are also provided. EEO Statement Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws. #J-18808-Ljbffr Micron Technology, Inc