Design Engineering Intern

At SK Hynix Memory Solution, we're at the forefront of semiconductor innovation, developing advanced memory solutions that power everything from smartphones to data centers. As a global leader in DRAM and NAND flash technologies, we drive the evolution of advancing mobile technology, empowering cloud computing, and pioneering future technologies. Our cutting‑edge memory technologies are essential in today's most advanced electronic devices and IT infrastructure, enabling enhanced performance and user experiences across the digital landscape. We're looking for innovative minds to join our mission of shaping the future of technology. At SK Hynix Memory, you'll be part of a team that's pioneering breakthrough memory solutions while maintaining a strong commitment to sustainability. We're not just adapting to technological change – we're driving it, with significant investments in artificial intelligence, machine learning, and eco‑friendly solutions and operational practices. As we continue to expand our market presence and push the boundaries of what's possible in semiconductor technology, we invite you to be part of our journey to creating the next generation of memory solutions that will define the future of computing. Internship Duration: 6 months Hours: 40 hours per week Start Date: Immediately Team Description: We are seeking a highly motivated and detail‑oriented intern to join our team to contribute to ongoing ASIC project. Responsibilities Perform design database management; proper check‑ins of golden files, reverting unused changes, merge different files. Code RTL logic with Verilog syntax. Run simulation using Synopsys VCS. Debug simulation environment; manage compilation failures, simulation hangs, functional failures, etc. Communicate with designers, verification engineers, and other team members to reach correct solutions. Minimum Qualifications BS/MS degree (completed or in progress) in Electrical Engineering, Electronics, Computer Science, or a related field. Proficiency in Verilog, SystemVerilog programming language. Strong communication skills in collaborative environments. Good work ethic: punctual on deadlines, trustworthy commitment to assignments. Available to work 40 hours per week, Monday–Friday. 100% onsite commitment for a 6‑month duration. Preferred Qualifications Problem‑solving mindset. Understanding of ASIC/FPGA workflow from concept to real silicon. Scripting language skills such as Python, Perl, Tcl, etc. Compensation $35/hr – $45/hr As set forth in SK hynix memory solutions America Inc.’s Equal Employment Opportunity policy, we do not discriminate on the basis of any protected group status under any applicable law. #J-18808-Ljbffr SK hynix memory solutions America Inc.