Hardware Design Engineer

Job TitleTop Hard Skills Required• Proficient in defining and developing unit and IP/SoC level test benches using SystemVerilog and VMM/OVM/UVM (5+ YOE)• Experience with high speed serial or wide parallel interfaces such as D2D, Ethernet/PCIe/USB or DDDR PHY IPs (5+ YOE)• Analog and Mixed-signal IP's such as Clients, Bandgaps, Power Regulators (5+ YOE)• Run tests on RTL and Gate Level Netlists, debug failures to root cause, and recommend fixes (5+ YOE)Skills Required:• Years of Experience Required: 10+ overall years of experience in the field.• Degrees or certifications required: Looking for actual experience – degree is less important, however a Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related degree would be relevant.• Disqualifiers: Candidates with history of short-term contracts / job hopping will not be eligible for the role.• Best vs. Average: The ideal resume would contain someone who has worked for Microsoft before and has UVM skillset. Projects are less important to the sponsor as technical skills are needed.Responsibilities:• Define, document, and implement a UVM verification environment including agents and scoreboards• Write test plans and implement them by developing tests, test generators, test benches, checkers, coverage, and other verification collateral• Run tests on RTL and Gate Level Netlists, debug failures to root cause, and recommend fixes• Support post-silicon verification activities of the products working with design and product teams