Hybrid VLSI Design Verification Intern (MS)

Hewlett Packard Enterprise is seeking a VLSI Design Verification Masters Level Intern in a hybrid role requiring two days per week in an HPE office in Colorado. You will collaborate with architects and verification engineers on a Slingshot switch/NIC ASIC verification project, learning SystemVerilog, UVM, and AI-assisted workflows. The role targets students pursuing a Master's degree in EE/CE/CS with coursework in digital design and architecture, plus programming experience in Python and

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