Cellular ASIC Design Engineer - Protocols
$171.6k - $302.2kApple Inc.
Description We're looking for a Cellular ASIC Design Engineer, where you will architect and implement protocol processing hardware for next-generation wireless SoCs. You will own the full lifecycle from early architectural exploration and HW/SW partitioning, through RTL implementation, to silicon bring-up and lab validation. You will collaborate closely with software, firmware and verification teams to deliver hardware that balances performance, flexibility, and power efficiency. Responsibilities Micro-architecture and RTL implementation for cellular protocol hardware. Analyze and optimize pipelining architectures to improve performance metrics. Drive latency optimization and quality of service (QoS) support. Define HW/FW/SW partitioning for protocol processing functions. Bring up and debug hardware in the lab. Minimum Qualifications BS and a minimum of 10 years relevant industry experience. Hands‑on expertise in SystemVerilog and Verilog. Skilled in with synthesis and timing analysis tools. Experience with low‑power design techniques. Proficiency with AMBA bus protocols (AXI, AHB) or similar on‑chip NoCs. Expertise in designing and optimizing scheduling and QoS mechanisms. Preferred Qualifications MS or PhD in Computer Engineering or Electrical Engineering. Understanding of cellular MAC, WiFi MAC or other data‑link layer (L2) protocols. Solid grasp of IP and TCP/UDP protocols. Background in network infrastructure architecture (e.g., routers, access points, switches). Experience with packet buffering, queuing, and scheduling. Knowledge of security algorithms (AES or similar). Experienced with scheduling and arbitration designs for memory subsystems. Developed architectural models in C/C++ or SystemC. Benefits At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $171,600 and $302,200, and your base pay will depend on your skills, qualifications, experience, and location. Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits. Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program. Equal Opportunity Employer Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant. Apple accepts applications to this posting on an ongoing basis. #J-18808-Ljbffr Apple Inc.
$201.3k - $367.4k
Apple Inc. is seeking a Cellular ASIC Design Engineer to enhance design methodologies in integrated circuits, focusing on power optimization and performance efficiency. The role requires a VLSI background with extensive industry experience and expertise in optimizing various...Suggested$201.3k - $367.4k
Description As a Cellular ASIC Design Engineer, you'll develop and optimize design and implementation methodology for integrated circuits across multiple focus areas including area efficiency, power optimization, and design technology co-optimization. You'll design innovative...SuggestedRelocation- A leading technology company is seeking a Cellular ASIC Design Engineer to architect and implement protocol processing hardware for cutting-edge wireless SoCs. You will manage the complete lifecycle from architectural exploration to lab validation, collaborating closely...Suggested
$140k - $210k
Overview Qualcomm Technologies, Inc. - Engineering Group, ASICS Engineering. Qualcomm is a leading... ...field 4+ years of experience with ASIC design and verification tools, techniques, and... ...Perl or Python Experience with AMBA Bus protocol (AXI/AHB/APB etc) is desirable (not...SuggestedWork experience placementWork from home$148.3k - $222.5k
A global technology company in San Diego is seeking a strong ASIC design engineer to join their Multimedia Camera HW team. This role focuses on the design of image and video processing blocks and requires collaboration with system architects. Ideal candidates should have...Suggested$120.3k - $210.1k
Wireless PHY Design Verification Engineer Join Apple's Wireless Connectivity team developing... ..., calibration engines, and protocol implementation. You'll... ...systems. Knowledge of ASIC verification flows with SystemVerilog... ...protocols, Bluetooth, Cellular, or similar communication...WorldwideRelocation$127.2k - $190.8k
A leading technology company in San Diego is seeking an ASIC design engineer with strong RTL development skills. The role involves developing RTL for micro-architecture and collaborating closely with verification and design teams. Minimum qualifications include a Bachelor...- Qualcomm is seeking an ASIC Engineer in San Diego, California, to drive the development of high-performance ASIC designs. The ideal candidate will have a background in ASIC design and verification, with a Bachelor's degree in a related field and at least 2 years of experience...
- A leading technology company located in California is seeking an experienced ASIC design engineer to join their Multimedia Camera HW team. The role involves collaborating with hardware architects, conducting RTL design, and evaluating tradeoffs in performance and power...
$127.2k - $190.8k
Overview Qualcomm Technologies, Inc. - Engineering Group, DSP Architecture and Design. A variety of high performance, low power Hexagon/NPU cores are at the... ...This position involves in-depth understanding of the ASIC design flow from RTL to GDS2 and the challenges posed...Work experience placement$115.6k - $173.4k
Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: Applicants selected will be subject... ...are seeking a highly skilled and motivated Physical Design Engineer to join our team. The ideal candidate will...Full timeWork experience placementImmediate startWork from homeShift work$140k - $210k
A leading technology firm is seeking a Senior ASIC Design Engineer located in California. The candidate will be responsible for designing high-speed memory subsystems for next-generation products, requiring over 5 years of experience in ASIC design and RTL coding. Responsibilities...$140k - $210k
Overview Company Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary Next Generation, High-... ...Cache Controller and Advanced Memory NoCs based Subsystem Design Team is looking for a Senior ASIC Design Engineers for...Work experience placementWork from homeNight shift- A leading technology innovator is looking for ASIC Design Engineers to architect and design next-generation DDR controllers. Responsibilities include developing RTL, collaborating with verification teams, and participating in C/C++ modeling of memory controller IP. Candidates...
$171.6k - $302.2k
...Wireless Design Engineer Come join Apple's growing wireless silicon development team. Our... ...will develop high performance low power ASIC design for wireless MAC, including:... ...system preferred Knowledge of wireless protocols such as Bluetooth, WLAN, or Zigbee preferred...Relocation$120.3k - $210.1k
We are seeking an ASIC Power Engineer to drive SoC power simulation, analysis and optimization for... ...comprehensive test cases within design verification environments. - Generate... ...Knowledge of WiFi or Bluetooth standards and protocols. Experience in SoC power simulation,...Relocation$104.1k - $173.4k
...Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary Role: Familiarity with RTL design in Verilog and SystemVerilog. Develop... ...Qualifications Knowledge of communication protocols such as AXI4-x, DDRx, PCIe, etc....Full timeWork experience placementFlexible hours$148.3k - $222.5k
...Qualcomm Technologies, Inc. Job Area Engineering Group, Engineering Group > Camera Engineering... ...Camera HW team is looking for a strong ASIC design engineer for an exciting opportunity to... ...RTL design Design Verification Bus protocols like AHB, AXI Image, Video, Graphics,...Work experience placementWork from home$139.5k - $258.1k
This small team of engineers designs and productizes Software-Defined Radios... ..., and researching cellular, 5G, Satellite communications... ...DSP algorithms in FPGAs or ASICs. Ability to use lab equipment... ...of high-speed communication protocols like PCIe, 100GbE, JESD204C,...Work experience placementRelocation$120.3k - $210.1k
...Cellular Power Optimization Software Engineer, Wireless Technologies & Ecosystems Apple's Cellular Software team... ...only developing proven software designs but also in disrupting traditional... ...work on various aspects of Cellular Protocol software, including SIM, NAS, AS,...Relocation- A leading technology firm is seeking an experienced engineer in San Diego to manage the complete verification lifecycle for digital power... ...Engineering or Science and over four years of experience in ASIC design and verification, with proficiency in SystemVerilog and...
- A leading technology company in San Diego seeks a Design Engineer to develop innovative digital designs. The role involves architecting and optimizing digital components while collaborating with cross-functional teams. Candidates should have extensive experience in RTL/...
$120.3k - $210.1k
Cellular Power Optimization Software Engineer, Wireless Technologies & Ecosystems San Diego, California, United States... ...only developing proven software designs but also in disrupting traditional... ...on various aspects of Cellular Protocol software, including SIM, NAS, AS,...RelocationShift work$140k - $210k
Qualcomm is searching for an experienced ASIC Engineer in San Diego, California. The role involves executing the design and architecture for System on Chip (SoC) projects, with responsibilities for problem-solving and team collaboration. Candidates should possess a Master...- A leading technology innovator is seeking an ASIC Engineer to join a dynamic SoC team. Candidates should have a Bachelor's degree in Science or Engineering with at least 4 years of experience in ASIC design, verification, or integration. Responsibilities include executing...
$128.9k - $173.4k
...\n## Job Area:\n\nEngineering Group, Engineering Group \u003e ASICS Engineering\n\nGeneral Summary:\n\nThis... ...for the digital architecture, design, Verilog RTL coding, implementation,... ...across established wireless standard/protocol in the mobile, networking, computing...Full time- Apple Inc. is seeking an ASIC Power Engineer in San Diego to lead SoC power simulation and optimization for wireless products. This role demands technical expertise in power estimation and involves collaboration with engineers to develop power-efficient SoCs. Candidates...
$127.2k - $190.8k
Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > DSP Architecture and Design General Summary: A variety of high performance, low... ...of cache, memory coherency, interconnect, bus protocol, and processor integration is a strong plus Minimum...Work experience placementWork from home$140k - $210k
Qualcomm is looking for a skilled engineer for their ASIC Implementation Team in San Diego, California. This role focuses on timing constraints... ...semiconductor chips, requiring at least 4 years of ASIC design experience. Candidates should be proficient with tools such...$139.5k - $258.1k
...particular emphasis on highly energy-efficient design and new technologies that transform the... ...by a world-class vertically integrated engineering team spanning RF/Analog architecture, and... ...experience. Skilled in defining ASIC microarchitecture to meet functional requirements...Relocation
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