Senior Mixed-Signal Verification Engineer (UVM)
Cirrus Logic
A prominent silicon technology company in Arizona seeks an experienced Design Verification Engineer to join its team. This role involves collaborating with digital and analog designers to ensure high-quality mixed-signal IC solutions. Candidates should have a Bachelor’s, Master’s, or PhD in Electrical Engineering or related fields, with relevant experience in ASIC verification and HDLs like Verilog and SystemVerilog. The position offers a rigorous working environment with opportunities to advance verification methodologies. #J-18808-Ljbffr Cirrus Logic
Vacancy posted 1 day ago
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