Remote | Semiconductor, ASIC & RFIC Design Consultant — Up to $110/hour

We are sharing a specialised part-time consulting opportunity for experienced electrical engineering professionals with deep semiconductor design, tapeout, analog/mixed-signal, RFIC, ASIC, physical design, verification, timing closure, and silicon validation expertise.

This role supports current and upcoming remote consulting opportunities focused on semiconductor architecture review, chip design methodology assessment, tapeout workflow evaluation, silicon validation, hardware engineering reasoning, and high-quality project execution. Selected professionals will apply real-world production silicon experience to review advanced semiconductor design tasks and provide technical insight across implementation, verification, and design tradeoffs.

Key Responsibilities

Professionals in this role may contribute to:

Semiconductor Design & Architecture Review

• Contribute expertise across analog, mixed-signal, RFIC, ASIC, or physical design workflows
• Review semiconductor architectures, implementation methodologies, and silicon design tradeoffs
• Assess technical materials involving power, performance, timing, area, verification, and implementation decisions
• Provide insight based on real-world production silicon experience

Tapeout, Verification & Silicon Validation

• Support tasks related to tapeout flows, verification, timing closure, and silicon validation
• Review work involving advanced semiconductor PDKs, schematic design, simulation, DRC/LVS, parasitic extraction, and silicon bring-up
• Evaluate pre-silicon and post-silicon development workflows for technical soundness
• Identify gaps in implementation methodology, verification planning, timing analysis, or physical design reasoning

Hardware Engineering Evaluation & Technical Feedback

• Review technical outputs involving semiconductor and hardware engineering workflows
• Provide clear written feedback on design quality, feasibility, tradeoffs, and engineering assumptions
• Explain architectural, power, performance, and timing tradeoffs in a precise and practical way
• Maintain accuracy, consistency, and strong engineering judgment across submitted materials

Ideal Profile

Strong candidates may have:

• Current location in the United States
• Hands-on ownership of chip blocks or systems through tapeout
• Experience with advanced semiconductor PDKs such as TSMC, GlobalFoundries, Samsung, Intel, or comparable platforms
• Familiarity with pre-silicon and post-silicon development flows
• Strong understanding of schematic design, simulation, verification, DRC/LVS, parasitic extraction, timing closure, and silicon bring-up
• Ability to explain semiconductor design tradeoffs clearly in writing
• Ability to work independently in a remote, project-based environment

Relevant Technical Experience May Include:

• Analog / Mixed-Signal Design: ADCs, PLLs, LDOs, SerDes, PMICs, sensor interfaces, or related circuit blocks
• RFIC Design: LNAs, mixers, transceivers, PLLs, PAs, mmWave systems, or related RF blocks
• ASIC / Physical Design: RTL, synthesis, STA, floorplanning, CTS, PnR, ECO flows, or related implementation work

Educational Background

• Academic backgrounds in electrical engineering, computer engineering, microelectronics, semiconductor design, applied physics, or related fields may be highly relevant
• Professional production silicon experience is especially valuable
• Equivalent hands-on semiconductor design, verification, tapeout, or silicon validation experience may be considered depending on project needs

Nice to Have

• Production silicon experience across commercial or high-performance chip programs
• Experience taping out RF designs at GHz or mmWave frequencies
• Experience working on advanced-node semiconductor designs
• Prior exposure to AI hardware, accelerators, or high-performance compute systems
• Experience explaining design decisions, implementation tradeoffs, and validation results to technical and cross-functional audiences
• Availability for approximately 15–20 hours per week depending on project scope

Why This Opportunity

• Apply semiconductor, ASIC, RFIC, and silicon design expertise to structured remote consulting work
• Contribute to high-quality hardware engineering review, technical evaluation, and semiconductor workflow assessment
• Work on assignments aligned with your tapeout, verification, physical design, analog, mixed-signal, RFIC, or production silicon background
• Use your engineering judgment to evaluate advanced chip design reasoning and implementation quality
• Remote structure with competitive hourly compensation

Contract Details

• Independent contractor role
• Fully remote with flexible scheduling
• Eligible professionals should be based in the United States depending on project needs
• Expected commitment of approximately 15–20 hours per week depending on project availability
• Competitive rates up to $110 per hour depending on expertise and project scope
• Weekly payments via Stripe or Wise
• Projects may be extended, shortened, or adjusted depending on scope and performance
• Work will not involve access to confidential or proprietary information from any employer, client, or institution

About the Platform

This opportunity is available through 24-MAG LLC. We connect experienced professionals with remote consulting opportunities across technical, evaluation, and project-based workstreams.

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