Hybrid VLSI Design Verification Intern (MS)
Hewlett Packard Enterprise Company
Hewlett Packard Enterprise Company in Colorado is seeking a VLSI Design Verification Masters Level Intern. The role is hybrid, requiring on-site work about 2 days per week, with hands-on work on Slingshot ASIC verification and AI-assisted tooling. You will learn industry-standard SystemVerilog/UVM and collaborate with designers and architects on high-performance interconnect projects. Ideal candidates are pursuing a Master’s degree in relevant fields, with coursework in digital design, #J-18808-Ljbffr Hewlett Packard Enterprise Company
Vacancy posted 4 days ago
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