Process Engineer

Company Description CDimension is redefining computing hardware to support the next generation of complex, high-performance technologies. The company develops ultra-thin 2D materials and vertically integrated chip architectures that significantly improve energy efficiency, performance, and scalability. Its proprietary processes enable atomically thin semiconductors to be grown directly on finished silicon wafers, targeting up to 1,000× gains in energy efficiency and compact, unified chips that integrate compute, memory, and power. CDimension’s technology is designed to overcome the physical and architectural limits of traditional silicon, enabling advanced systems for AI inference, robotics, quantum computing, and other demanding applications. The organization collaborates closely with researchers and industry partners to build the materials backbone for the future of computing. Role Description The Process Engineer role at CDimension is a full-time, on-site position based in San Jose, CA. The Process Engineer will design, develop, and optimize semiconductor process flows for advanced 2D materials and vertically integrated chip architectures. Daily activities include defining process recipes, monitoring process performance, performing root-cause analysis on yield or reliability issues, and implementing corrective actions to improve stability and throughput. The role involves close collaboration with materials scientists, device engineers, and manufacturing teams on pilot and production environments. The Process Engineer will document procedures, maintain process control systems, and ensure adherence to safety, quality, and environmental standards. Qualifications Strong foundation in Process Engineering and Chemical Engineering, with experience in semiconductor or advanced materials processing. Demonstrated ability in Process Design and Process Control, including developing process flows, recipes, and control plans. Advanced Analytical Skills for data-driven troubleshooting, statistical analysis, and continuous improvement of process performance. 2-5 years industrial experience with thin-film deposition, etching, or related wafer fabrication techniques is highly beneficial. Bachelor’s or Master’s degree in Chemical Engineering, Materials Science, Electrical Engineering, or a related engineering discipline. Comfort working hands-on with equipment, conducting experiments, and documenting results in a structured, traceable manner. Effective communication and collaboration skills for cross-functional work with R&D, operations, and external partners. Ability to work on-site full-time in San Jose, CA and comply with safety and quality standards in a laboratory and manufacturing environment. #J-18808-Ljbffr CDimension Inc.