Senior IP/SoC Verification Architect
FHLB Des Moines
FHLB Des Moines is seeking a Senior Technical Staff Engineer in Chandler, Arizona, to lead IP-level verification for dsPIC products. Responsibilities include architecting UVM verification environments, collaborating with global teams, and ensuring high-quality results. The ideal candidate has a Bachelor's or Master's degree in Electrical Engineering and at least 15 years of verification experience, particularly in SystemVerilog and UVM methodology. Join a company committed to empowering innovation and supporting employee growth. #J-18808-Ljbffr FHLB Des Moines
Vacancy posted 10 hours ago
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