Senior SerDes Validation & Margin Architect
Apple Oakbrook
Apple in Emeryville, CA seeks a seasoned SerDes Robustness Analysis & Validation Architect to push high-speed SerDes PHYs (PCIe, USB) to the edge through stress testing and margin analysis. You will architect validation strategies beyond spec checks, collaborate with design and system teams, and lead hands-on lab experiments to uncover edge-case failures and drive design-for-test and observability improvements across multiple silicon revisions. #J-18808-Ljbffr Apple
Vacancy posted 2 days ago
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