Principal FPGA Engineer

Principal FPGA Engineer - Onsite position Curtiss‑Wright is seeking an experienced Principal FPGA Engineer to join our engineering team in Ashburn, VA. In this senior, hands‑on role, you will lead the design and development of FPGA‑based solutions for DoD and other stakeholder secure products. The products include VITA standards based VPX modules and custom form‑factor boards for DoD sub‑systems and systems. You will also mentor junior engineers and provide technical guidance across projects. You will collaborate with cross‑functional engineering teams and customers, contributing to concept development, FPGA architecture, HDL coding, simulation, prototyping, and product release. This role requires strong technical expertise, leadership, and the ability to drive complex projects to completion. Location: Ashburn, VA / Boston, MA / Nashua, NH We Take Care of Our People Paid Time Off 401K with Employer Match and Profit Sharing Health and Wellness Benefits Learning and Development Opportunities Referral Program Competitive Pay Recognition Employee Stock Purchase Plan Inclusive & Supportive Culture Salary Information: $144,100.00 - 192,100.00 plus bonus. Please note that the salary range information provided is a general guideline only, reflecting a position based in Virginia. Criteria such as the candidate’s qualifications and relevant experience, the scope of the specific position, as well as market and business considerations will be evaluated when extending an offer. Your Challenge Work collaboratively with an Integrated Product Team (IPT) comprised of Program Manager(s), Chief Engineer or Principal Systems Engineer, and several hardware (electrical), FPGA, software, test, component, and manufacturing engineers to bring products from concept through production release. Also support sustaining engineering efforts as needed. As needed, participate in project planning, scheduling, and resource estimation, ensuring timely delivery of designs. As needed, lead FPGA design projects, providing architecture, implementation, and validation guidance. Develop detailed FPGA architectures and specifications for IP blocks. Drive FPGA development from concept through coding, simulation, synthesis, place‑and‑route, and bitstream generation. Perform digital logic design and implement HDL using current FPGA technologies. Verify and validate HDL designs through simulation and hardware testing. Mentor and provide technical guidance to junior FPGA engineers. Oversee circuit card development, prototype build, testing, and debugging activities. Contribute to new product development through environmental testing and transition into production. What You Bring Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related field. Advanced degree is a plus. 10+ years of FPGA hardware development experience, including high‑speed, mixed‑signal, or embedded applications at 100/400 Gz data rates. Strong understanding of FPGA design flow, including RTL design (System Verilog, Verilog, or VHDL), simulation, synthesis, and timing closure. Proven problem‑solving and debugging skills, with hands‑on experience using lab equipment (oscilloscopes, logic analyzers, etc.). Experience leading projects or mentoring team members is preferred. US Citizenship is mandatory; Active security clearance is preferred. Experience/familiarity in the following is an asset Simulation test benches using Model Sim or Questa Xilinx ISE/Vivado tools Xilinx 7‑Series, Zynq MPSoC, Versal Adaptive SoC, UltraScale+ Embedded processor design and C software development Vivado IP Integrator or other IP integration tools FPGA platforms from AMD (Xilinx), Microchip, or Intel (Altera) Microchip Libero SoC or Intel Quartus Board bring‑up and debug (e.g., ChipScope or integrated logic analyzers) High‑speed digital design and signal integrity concepts Requirements capture, analysis, and tracking High‑speed serial interfaces and related IP TCL or other automation scripting FPGA resource and power estimation tools Compliance Statement This position may require exposure to export‑controlled information and subject to additional security screening. In the event information provided during the security screening reveals ineligibility to access export‑controlled information, any offer of employment may be reconsidered or withdrawn. Curtiss‑Wright is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, ethnicity, color, sexual orientation, gender identity, physical or mental disability, age, ancestry, legally protected medical condition, family care status, marital status, religion, veteran status, national origin, or any other legally protected status. If you require accommodation during the recruitment process, please contact Talent Acquisition. For US Applicants: EEO is The Law – click here for more information. If you require accommodation due to a disability at any time during the recruitment and/or assessment process, please contact Talent Acquisition and we will make all reasonable efforts to accommodate your request. #J-18808-Ljbffr Curtiss-Wright Corporation