Reliability Lab Shock and Vibration Testing Engineer

The Stress Test and Reliability Laboratory organization is looking for a dynamic, hands‑on engineer to join their environmental stress tool engineering team in Chandler, AZ. The lab engineering team develops and maintains a fleet of equipment which is used to evaluate Intel's silicon, package, and assembly technologies under simulated field use including heat, humidity, temperature change, and dynamic stresses such as shock and vibration. This role will focus on supporting our dynamics stress capability. In this role, you will be responsible for developing, executing, and analyzing mechanical reliability and environmental stress testing programs for semiconductor devices, boards, and assemblies. The role requires expertise in shock, vibration, and dynamic mechanical loading methodologies with a strong emphasis on industry-standard test requirements and a deep knowledge of the physics of failure.

Responsibilities

• Develop, plan, and execute dynamic stress tests, including shock, vibration, and other test methods in compliance with JEDEC, IPC, and/or customer requirements.
• Develop test fixtures, instrumentation strategies, and data acquisition systems to support mechanical reliability evaluations.
• Working with the operations team, perform testing on devices.
• Analyze test data using statistical and engineering methods to identify failure modes, performance limits, and reliability risks.
• Correlate test data to mechanical models to validate and improve simulation results.
• Generate detailed test plans, procedures, reports, and qualification documentation.
• Drive continuous improvement of laboratory capabilities, test automation, and best practices for dynamic stress testing.
• Ensure laboratory operations comply with applicable safety, quality, and calibration requirements.
• Provide technical guidance regarding shock and vibration requirements throughout the product development lifecycle.

Minimum Requirements

Degree in Mechanical Engineering, Aerospace Engineering, Materials Engineering, or similar STEM related degree: BS with 4+ years of experience in shock and vibration stress testing/methods -OR- MS with 1+ years of experience in shock and vibration stress testing/methods - OR- PhD with 6 months+ of experience in shock and vibration stress testing/methods

• Hands‑on experience conducting shock and vibration testing using electrodynamic shakers and mechanical shock equipment.
• Working knowledge of JEDEC and/or IPC standards related to board‑level reliability and mechanical stress testing.
• Experience developing test plans, procedures, and qualification reports.
• Proficiency with data acquisition systems, accelerometers, strain gauges, and vibration control software.
• Experience analyzing vibration and shock response data and interpreting failure mechanisms.
• Understanding of finite element analysis (FEA) results and correlation to physical testing.

Preferred Qualifications

• Deep expertise with JEDEC standards such as JESD22-B103, JESD22-B110, JESD22-B111, and other relevant mechanical reliability requirements.
• Experience interpreting and applying IPC standards including IPC-9703 and related solder joint reliability specifications.
• Familiarity with military, aerospace, or transportation standards such as MIL-STD-810, ASTM, and IEC environmental test methods.
• Advanced knowledge of vibration analysis, modal analysis, frequency response functions (FRFs), and resonance characterization.
• Proficiency with FEA tools such as Comsol Multiphysics, ANSYS, Abaqus, or Nastran.
• Experience with standard and high‑speed data acquisition systems (including DMM) and automated test scripting using Python, MATLAB, or LabVIEW.
• Laboratory leadership experience, including test equipment specification, procurement, calibration management, and mentoring junior engineers.
• Proficiency in electrical measurements, calibration, and troubleshooting programmable DC power supplies, multimeters, and other instrumentation.
• Experience with data acquisition systems, instrumentation communication protocols (e.g., Ethernet, RS-232, GPIB), and automated test equipment.
• Knowledge of design of experiments, statistical process control, and measurement system analysis.
• Strong troubleshooting, root cause analysis, and problem‑solving skills.
• Excellent written and verbal communication skills.
• Ability to work effectively in cross‑functional engineering environments.

Your expertise and enthusiasm for engineering excellence can help shape the future of semiconductor innovation.

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Job Details

• Job Type: Experienced Hire
• Shift: Shift 1 (United States of America)
• Primary Location: US, Arizona, Phoenix
• Additional Locations:

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $115,110.00-219,550.00 USD

Work Model for this Role This role will require an on‑site presence.

Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.