ASIC/FPGA Design and Verification Engineer - (Lead, Senior, or Principal)

Overview ASIC/FPGA Design and Verification Engineer – (Lead, Senior, or Principal) for The Boeing Company – Boeing Space, Intelligence & Weapons Systems. The role is located in Albuquerque, NM, supporting complex ASICs and FPGAs used across Boeing’s commercial, space, and defense programs. Responsibilities Design and develop FPGA designs and embedded software. Work with cross‑functional hardware and software teams to define/refine system requirements and ensure seamless software–hardware compatibility. Conduct unit‑level testing, verification, and validation of embedded software and firmware, using oscilloscopes and logic analyzers. Create and maintain technical documentation, including requirements documents, design specifications, test plans, and interface control documents. Support integration of software and hardware components, from initial hardware bring‑up to final system validation. Analyze and enhance efficiency, stability, scalability, and performance of system resources within low‑power or memory constraints. Lead FPGA/ASIC designs, including multi‑FPGA/ASIC programs and leading teams of design and verification engineers. Collaborate with customers, system engineers, and hardware engineers to capture requirements and architect digital logic functions. Explore trade‑space of potential ASIC/FPGA technologies, evaluating SCRAP (Schedule, Cost, Risk, Area, Power) versus performance. Implement design practices and tools from micro‑architecture through HDL coding and physical design realization. Integrate DSP IP from Boeing’s algorithm team and third‑party IP as needed. Perform static timing analysis, LEC, CDC, linting and other checks to ensure schedule compliance. Develop functional coverage models and perform code coverage to verify designs in simulation. Create self‑checking and reusable testbenches, applying Object‑Oriented Programming concepts such as Inheritance and Polymorphism, and leverage UVM. Drive FPGA‑based prototyping and validation depending on program and system requirements. Validate design through hardware integration test with special test equipment, test‑beds, and higher‑level systems as needed. Train and mentor less senior engineers and help build effective project teams. Qualifications Bachelor of Science degree in Engineering (Electrical, Mechanical, Aeronautical), Computer Science, Data Science, Mathematics, Physics, Chemistry or equivalent. 9+ years of ASIC/FPGA design or verification experience (or Master’s degree plus 7+ years). Experience with ASIC/FPGA architectural definition, detailed design implementation and functional verification using SystemVerilog. Professional experience with hardware‑based integration and test of ASIC/FPGA designs. Preferred Qualifications Senior (Level5): 14+ years of related work experience; Principal (Level6): 20+ years of related work experience. Master’s degree in EE, Computer Engineering/Science, or related field. Proven record of leading ASIC/FPGA design and/or verification teams. Experience with hardware emulators, especially Palladium. Proficiency with SystemVerilog Assertion and hardware verification languages. Experience creating self‑checking and reusable testbenches from scratch. Experience with high‑speed Serdes interfaces (JESD204C, PCIe, Ethernet). Proficient in scripting languages (Make, Perl, Python, etc.). Revision control experience (SVN, CVS, Git) and Linux environments. Familiarity with space‑based design techniques and radiation mitigation. History of 1st‑pass success with ASIC designs. Typical Education/Experience by Level Lead (Level4): 9+ years of experience; Senior (Level5): 14+ years; Principal (Level6): 20+ years. Security Clearance This position requires the ability to obtain a U.S. Security Clearance. An interim and/or final U.S. Secret Clearance Post‑Start is required. U.S. citizenship is a condition of employment. Relocation & Compensation Relocation: Basic relocation will be offered for eligible internal candidates. Pay ranges by level: Lead (Level4): $136,850‑$185,150; Senior (Level5): $164,900‑$223,100; Principal (Level6): $197,200‑$266,800. Shift 1st shift (United States of America). EEO & Equal Opportunity Boeing is an Equal Opportunity Employer. Employment decisions are made without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, physical or mental disability, genetic factors, military/veteran status or other characteristics protected by law. EEO is the law. #J-18808-Ljbffr Boeing