Senior FPGA Engineer

About Castelion Castelion is bringing a new approach to defense development and production: one that focuses on short, iterative design cycles, rapid testing in development, and modern commercial manufacturing strategies for production at scale. We're designing, building, and testing next generation long range strike weapons systems to give America and its Allies a definitive edge and deter future conflicts. Senior FPGA Engineer Castelion is seeking a Senior FPGA Engineer with strong experience in Vitis HLS and High-Level Synthesis workflows to support the development of high-performance digital systems for mission-critical hardware. This is a high-impact, full-time role focused on accelerating FPGA development by translating algorithmic and system-level requirements into efficient FPGA implementations using C/C++-based design flows. You will work closely with our hardware, software, and systems engineering teams to implement and optimize FPGA-based processing capabilities. This role is ideal for an engineer who can ramp quickly, contribute immediately, and deliver optimized hardware implementations in a fast-moving development environment. Responsibilities Develop FPGA-based implementations using Vitis HLS to generate VHDL/Verilog from C/C++ code Translate algorithms and system requirements into efficient hardware architectures optimized for performance and latency Develop and optimize high-level synthesis pipelines and dataflow architectures Collaborate with software, avionics, and systems engineers to integrate FPGA functionality into embedded platforms Perform FPGA simulation, synthesis, timing analysis, and hardware validation Optimize designs for throughput, determinism, and resource utilization Support hardware integration, board bring‑up, and debugging as needed Contribute to verification and testing of FPGA functionality Basic Qualifications Bachelor's degree in Electrical Engineering, Computer Engineering, or related technical field Demonstrated experience using Vitis HLS or similar High-Level Synthesis tools Strong C/C++ programming experience for hardware-oriented development Experience generating VHDL or Verilog from HLS workflows Familiarity with FPGA development flows including simulation, synthesis, and timing closure Experience with Xilinx/AMD FPGA platforms and toolchains Preferred Skills and Experience Experience with high-throughput signal processing, sensor processing, or real-time embedded systems Experience optimizing HLS pipelines for latency, parallelism, and memory bandwidth Familiarity with AXI interfaces, DMA, and FPGA-based accelerators Experience with Vivado and Vitis development environments Background in aerospace, defense, robotics, or other high-performance embedded systems Leadership Qualities Bias to Action and Creative Problem Solving . Desire and experience questioning assumptions in ways that lead to break through ideas that are ultimately implemented. Successfully bring in applicable processes/concepts/materials from other industries to achieve efficiency gains. Ability to personally resolve minor issues in development without requiring significant support. High Commitment, High Initiative . A successful candidate will have a genuine passion for Castelion's mission and consistently look for ways to contribute to the company's technical goals and prevent hardware blockers. Ability to work in a fast paced, autonomously driven, and demanding atmosphere. Strong sense of accountability and integrity. Clear Communicator . Proactively communicates blockers. Trusted in previous roles to be voice of company with regulators, suppliers, gate keepers and customers. Capable of tactfully managing relationships with stakeholders to achieve company-desired outcomes without compromising relationships. Emails, IMs and verbal interactions are logical, drive clarity, and detailed enough to eliminate ambiguity. All employees are granted long-term stock incentives as part of their employment as Castelion. All employees receive access to comprehensive medical, vision, and dental insurance, and the company offers three weeks of paid time off per year. Employment with Castelion is governed on the basis of competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status. While this position does not currently require a U.S government‑issued security clearance, it may in the near future. Therefore, the ability to obtain and maintain a U.S. government–issued security clearance is required. U.S. citizenship is required, as only U.S. citizens are eligible for a security clearance. #J-18808-Ljbffr