Senior Digital Validation Engineer

Secure Transactions and Identification (STI) works at the forefront of technology providing solutions for mobile wallet (payment, transit, access), mobile security, and UWB in consumer products ranging from wearables, smart phones to laptops.STI Digital Validation team is responsible for ensuring the functionality, performance, and robustness of SoC devices across pre‑silicon and post‑silicon phases. We are seeking a Senior Digital Validation Engineer to work at San Diego location with deep SoC validation experience and a passion for ARM and RISC‑V based architectures , low‑level software development, hands‑on lab bring‑up, scalable validation automation, and standard SoC communication interfaces .In this role, you will take technical ownership of validation efforts , lead complex system‑level debug, and design automation solutions that enable efficient, repeatable silicon validation.Key ResponsibilitiesOwn and drive block‑level and system‑level validation strategy , including validation scope, coverage, and test planningPerform deep analysis of specifications and system use cases to ensure complete functional, performance, and interface coverageReview validation strategies with key stakeholders, including design leads, system teams, and architectsImplement and maintain validation test infrastructure using C and JavaValidate interface functionality, performance, power behavior, and corner cases across operating modesLead validation on pre‑silicon platforms , such as FPGA emulationExecute and guide post‑silicon validation campaigns , including silicon bring‑up, evaluation, and characterizationPerform hands‑on lab validation using oscilloscopes, advanced power supplies, DMMs, source meters (SMUs), waveform generators, and temperature controllersDesign and implement automation solutions for validation workflows, including:Automated test execution and sequencingInstrument control and configurationData collection, analysis, and reportingRegression testing across silicon revisionsDevelop automation primarily using Python , integrating low‑level C test code with higher‑level control frameworksDrive complex hardware/software co‑debug , including root‑cause analysis of interface, protocol, and timing‑related issuesMentor junior engineers and provide technical leadership in validation and automation best practicesRequired QualificationsMaster’s degree in Computer Science, Computer Engineering, Electrical EngineeringAt least 5 years of industry related experienceStrong professional experience in SoC digital validationExtensive experience with embedded C programming with either ARM or RISCV based microcontrollers.Proficiency in at least one object‑oriented programming language (Java, C++, C#, etc.)Strong experience with automation and scripting , preferably PythonHands‑on experience validating SoC communication interfaces such as I2C / I3C, SPI, SPMI, ISO‑UART (7816)Strong hands‑on lab experience with electrical measurement and control equipment, including:OscilloscopesProgrammable power suppliesDMMsSource meters (SMUs)Waveform / signal generatorsTemperature / thermal controllersProven ability to debug complex issues across protocol, hardware, firmware, and system levelsStrong sense of ownership, technical judgment, and attention to detailPreferred Qualifications (Nice to Have)Background in design verification or close collaboration with DV teamsExperience with post‑silicon logic debug , including deep analysis of test logsExperience developing software hooks or firmware instrumentation for debugFamiliarity with ARM‑ or RISC‑V‑based SoC architectures and system bring‑upExperience improving validation workflows through automation, regression frameworks, or lab infrastructure standardizationWhy Join This RoleSenior‑level ownership with direct impact on silicon readiness and product qualityStrong emphasis on hands‑on lab work, block level and system level validation, interface validation, and automationOpportunity to influence validation methodology and toolingExposure to the full SoC lifecycle, from pre‑silicon through production siliconClose collaboration with architecture, design, systems, and validation teamsThe base salary range for this position is as mentioned below per year. We also provide competitive benefits, incentive compensation, and/or equity for certain roles.Company benefits include health. dental, and vision insurance. 401(k), and paid leave. Please note that the base salary range (OR hourly rate) is a guideline, and individual total compensation may vary based on a number of factors such as qualifications, skill level, work location, and other business and organizational needs. This base pay range is specific to California and is not applicable to other locations. A reasonable estimate of the base salary range as of the date of this posting is:$130,600 to $179,600 annuallyMore information about NXP in the United States...NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law. In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals.#LI-6692 #J-18808-Ljbffr NXP Semiconductors