Synthesis DFT Stitch CAD Engineer

Salary: $174,400 - 261,600 per year Requirements:

• Bachelors or masters degree, or PhD, in Computer Engineering, Electrical Engineering, Science, Engineering, or a related discipline
• 5–10 years of experience in VLSI CAD, preferably with Synthesis, DFT, and place-and-route work
• 5–10 years of experience using scripting tools and programming languages, with Python and TCL preferred
• 6+ years of ASIC design, verification, validation, integration, or related experience with a bachelors degree
• 5+ years of ASIC design, verification, validation, integration, or related experience with a masters degree
• 4+ years of ASIC design, verification, validation, integration, or related experience with a PhD

• We develop our DFT stitch flow and methods using Synopsys and Cadence solutions and tools
• We improve SoC Synthesis and DFT Stitch methodologies for Mobile, Compute, AI, and IoT Snapdragon chips
• We enable new capabilities from EDA tools and internal tools for Synthesis and DFT Stitch checks
• We build and support methodologies for handling complex multi-voltage crossings on DFT paths
• We support Snapdragon design teams with CAD solutions, analyze requests, and manage them through ticket queues
• We work with EDA vendors to deliver production-ready toolsets that meet project needs
• We set up, expand, and maintain regressions for complex DFT Stitch and Synthesis test cases
• We innovate on design, tool, and flow techniques to reduce area, lower dynamic power, and improve turnaround time, including patent-related work
• We enable Synthesis and DFT Stitch flows for advanced foundry process nodes
• We guide EDA vendor roadmaps for DFT stitch techniques in collaboration with Snapdragon DFT, Implementation, and DFT CAD teams
• We contribute to R&D initiatives with our AI team to improve die area, dynamic power, performance, and turnaround time
• We investigate implementation issues such as cell legalization problems, congestion hotspots, and DFT stitch failures
• We work with EDA vendor application engineers to resolve block convergence issues faced by Snapdragon design teams

• AI
• Flow
• IoT
• Support
• Mobile
• Python
• Cisco
• REST
• Security
• Web

More:

We are Qualcomm Technologies, Inc., and our Global CAD team is driving advanced gate-level synthesis and DFT stitch solutions for Snapdragon chips powering billions of mobile devices. Our work spans implementation tooling, methodology development, and automation for highly complex designs, including multi-voltage and performance, area, and power goals. We offer a competitive compensation package with a salary range of $174,400 to $261,600, along with an annual discretionary bonus, potential annual RSU grants, and a strong benefits package designed to support life at work, at home, and at play. We are committed to accessibility, equal opportunity, and a professional hiring process for qualified applicants.

last updated 39 week of 2026