Senior RF Engineer

About the Role Snowcap's PCL logic is clocked and powered by microwave energy. That energy has to be generated, conditioned, and carried from room temperature down through every thermal stage to a chip sitting at 4.2 Kelvin. It has to arrive clean, matched, and without dragging a thermal load into the cold stage that the cryogenic plant cannot absorb. The RF power delivery network is the structure that makes that possible. This role builds it. You will own the RF PDN end to end: system architecture and budget, on-chip and off-chip circuit design, EM and circuit simulation, tapeout of dedicated RF PDN validation vehicles, and integration of PDN structures into product chip tapeouts. You will define what "correct" means for the PDN: the specs, the verification plan, the measurement protocol. Then you will prove it on real silicon in our own cryogenic lab. You will work directly with the physics team, the design and EDA group, the fab technology team, and the test organization in a flat, matrixed structure. There are no layers between you and the problem. In twelve months, the PDN architecture you set should be the one every subsequent chip generation inherits, the simulation-to-measurement correlation on it should be tight enough that the design team trusts the model, and the PDN should be a first-class object in the automated EDA flow rather than something bolted on at the end. This is a founding-level technical seat in an area where we have no incumbent methodology. What You'll Do Own RF system and circuit design for the power delivery network across 30–60 GHz, including spec definition and design reviews from room temperature down to 4.2 K. Model, simulate, and optimize in ADS, AWR/Microwave Office, HFSS or CST, and Python/MATLAB — with Spectre RF and Clarity in the Cadence flow. Design, verify, and tape out RF PDN validation chips, and carry PDN structures into product chip tapeouts. Build and run the validation plans: VNA, spectrum analyzer, signal generator, power meter, and automated test, correlated back against simulation. Lead root-cause analysis across lab and production, and drive the fix into design, layout, or process. Work with the digital design and EDA team to make RF PDN a first-class object in the automated flow, and set the bar for junior engineers in design reviews and documentation. What You'll Bring BS in Electrical Engineering or RF/microwave engineering (MS or PhD welcome), and 7+ years of hands‑on RF work in real product development. RF passive and MMIC tapeouts at 30 GHz and above in advanced CMOS nodes — a hard requirement, not a preference. Command of the fundamentals: S-parameters, matching, stability, noise, nonlinearity and intermodulation, transmission lines. Track record designing and debugging LNAs, PAs, mixers, VCO/PLL, switches, filters, and couplers through to working hardware. Fluency on the bench and in the tools — RF instrumentation, Cadence Virtuoso and Pegasus, Python, Git — and the judgment to tell a fixture problem from a model problem. Clear technical writing, and the ability to put a tradeoff in front of a physicist, a digital designer, and a fab engineer in the terms each one needs. Familiarity with superconducting microwave circuits is a definate plus. Work Environment Snowcap is a small, technically elite team building something with no prior art at commercial scale. There is no reference RF PDN for a superconducting logic processor. You will define the architecture, defend it in review, watch real measurements disagree with it, and revise it. All on a tapeout cadence, not a research timeline. We are flat and matrixed. You will work daily with the chief scientist, the CTO, fab technology, digital design and EDA, and the cryogenic test group. Directly, without intermediaries. When a measurement contradicts a planned design change, that conversation happens the same afternoon. The work is part desk and part bench. You will spend real hours in an RF and cryogenic lab environment with hardware in front of you, and you will be present for cold-test campaigns rather than reading the report afterward. Occasional travel is required for supplier engagement, foundry and manufacturing support, and external test and characterization work. If you want a mature RF organization with a settled design kit and a stable spec, this is not it. If you want to write the design kit, you are in the right place. Why Snowcap Snowcap Compute is building the world's first commercial superconducting digital computer. Our chips operate at 4.5 Kelvin on Josephson junction-based PCL logic, consuming a fraction of the power of any CMOS system. We are not improving the existing paradigm — we are replacing it. We are a technically elite, small team at the intersection of quantum physics, cryogenic engineering, and advanced semiconductor manufacturing. Every person on this team has a direct line of sight to the product. The work you do here will be visible, consequential, and unprecedented. Benefits Full medical, dental, and vision 401(k) Relocation assistance available for candidates outside the area. Compensation Base salary range is shown in USD and reflects the Jacksonville Metro labor market for this role, calibrated against NASA federal pay scale (Palm Bay locality) and comparable FL semiconductor / defense private-sector roles. Actual offer depends on experience, skills, and seniority, and is exclusive of equity, bonus, and benefits. Florida has no state income tax; relocating candidates should factor that into side‑by‑side comparisons with high‑tax‑state offers. Base range USD 170000–245000 Equity Equity participation is available for the right candidates. Please see compensation note above. Equal Employment Opportunity Snowcap is an equal opportunity employer. We do not discriminate on the basis of race, color, religion, sex, national origin, age, disability, veteran status, or any other protected characteristic. #J-18808-Ljbffr